A5133Config.h 15 KB

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  1. /********************************************************************
  2. * A5133Config.h
  3. * RF Chip-A5133 Config Definitions
  4. *
  5. ********************************************************************/
  6. #ifndef _A5133CONFIG_h_
  7. #define _A5133CONFIG_h_
  8. /************************************
  9. * Define DR
  10. ************************************/
  11. #define DR_4Mbps //IF=4MHz
  12. // #define DR_2Mbps //IF=2MHz
  13. // #define DR_1Mbps //IF=1MHz, SRD=0
  14. // #define DR_500Kbps //IF=1MHz, SRD=1
  15. #ifdef DR_4Mbps
  16. const uint8_t A5133_RFConfigTab_Main[]=
  17. {
  18. 0x00, //RESET register,
  19. 0x62, //MODE register,
  20. 0x00, //CALIBRATION register,
  21. 0x3F, //FIFO1 register,
  22. 0x00, //FIFO2 register,
  23. 0x00, //FIFO register,
  24. 0x00, //IDDATA register,
  25. 0x00, //RCOSC1 register,
  26. 0x00, //RCOSC2 register,
  27. 0x0C, //RCOSC3 register,
  28. 0x02, //CKO register,
  29. 0x01, //GPIO1 register
  30. 0x1D, //GPIO2 register,
  31. 0x1F, //DATARATECLOCK register,
  32. 0x00, //PLL1 register,
  33. 0x1E, //PLL2 register,
  34. 0x59, //PLL3 register,
  35. 0x74, //PLL4 register,
  36. 0x01, //PLL5 register,
  37. 0x28, //ChannelGroup1 register,2024年7月16日
  38. 0x50, //ChannelGroup1 register,2024年7月16日
  39. 0x2D, //TX1 register,
  40. 0x40, //TX2 register,
  41. 0x1B, //DELAY1 register,
  42. 0x40, //DELAY2 register,
  43. 0x70, //RX register,
  44. 0x7B, //RXGAIN1 register,
  45. 0xC0, //RXGAIN2 register,
  46. 0x3C, //RXGAIN3 register,
  47. 0xCA, //RXGAIN4 register,
  48. 0x00, //RSSI register,
  49. 0xC1, //ADC register,2024年7月16日
  50. 0x00, //CODE1 register,
  51. 0x00, //CODE2 register,
  52. 0x00, //CODE3 register,
  53. 0xE4, //IFCAL1 register,
  54. 0x01, //IFCAL2 register,
  55. 0x4F, //VCOCCAL register,
  56. 0xC0, //VCOCAL1 register,
  57. 0x80, //VCOCAL2 register,
  58. 0x30, //VCO deviation 1 register,
  59. 0x40, //VCO deviation 2 register,
  60. 0x00, //DSA register,
  61. 0xFF, //VCO Modulation delay register,
  62. 0x40, //BATTERY register,
  63. 0xA7, //TXTEST register,2024年7月16日
  64. 0x57, //RXDEM1 register,
  65. 0x74, //RXDEM2 register,
  66. 0xF3, //CPC1 register,
  67. 0x33, //CPC2 register,
  68. 0x4D, //CRYSTAL register,
  69. 0x15, //PLLTEST register,
  70. 0x0F, //VCOTEST register,
  71. 0x00, //RF Analog register,
  72. 0x00, //Key data register,
  73. 0x33, //Channel select register,
  74. 0x00, //ROM register,
  75. 0x00, //DataRate register,
  76. 0x00, //FCR register,
  77. 0x00, //ARD register,
  78. 0x00, //AFEP register,
  79. 0x00, //FCB register,
  80. 0x00, //KEYC register,
  81. 0x00 //USID register,
  82. };
  83. const uint8_t A5133_RFConfigTab_Addr0x20[]=
  84. {
  85. 0x0E, //page0,
  86. 0x00, //page1,
  87. 0x00, //Page2,
  88. 0x00, //page3,
  89. 0x00, //page4,
  90. 0x00, //page5,
  91. 0x00, //page6,
  92. 0x00, //page7,
  93. 0x00, //page8,
  94. 0x00, //page9,
  95. 0x02, //page10,
  96. 0x00, //page11,
  97. 0x00 //page12,
  98. };
  99. const uint8_t A5133_RFConfigTab_Addr0x21[]=
  100. {
  101. 0x09, //page0,
  102. 0x00, //page1,
  103. 0x00, //Page2,
  104. 0x00, //page3,
  105. 0x00, //page4,
  106. 0x00, //page5,
  107. 0xE0, //page6,2024年7月16日
  108. 0x00, //page7,
  109. 0x2C, //page8,2024年7月16日
  110. 0x4F, //page9,
  111. 0x01, //page10
  112. 0x42, //page11,2024年7月16日
  113. 0x56 //page12 crystal type 3225, CL=9pF, CSXTL=108,2024年7月16日
  114. };
  115. const uint8_t A5133_RFConfigTab_Addr0x22[]=
  116. {
  117. 0x00, //page0,
  118. 0x10, //page1,
  119. 0x00, //Page2,
  120. 0x10, //page3,
  121. 0x00, //page4,
  122. 0x04 //page5,
  123. };
  124. const uint8_t A5133_RFConfigTab_Addr0x2A[]=
  125. {
  126. 0x00, //page0,
  127. 0x01, //page1,
  128. 0xF0, //Page2,
  129. 0x80, //page3,
  130. 0x80, //page4,
  131. 0x48, //page5,
  132. 0x03, //page6,2024年7月16日
  133. 0xC0, //page7,
  134. 0x3A, //page8,
  135. 0x3E, //page9,
  136. 0xE8, //page10,
  137. 0x80, //page11,
  138. 0x00 //page12,
  139. };
  140. const uint8_t A5133_RFConfigTab_Addr0x38[]=
  141. {
  142. 0x80, //page0,
  143. 0x50, //page1,2024年7月16日
  144. 0x20, //page2,
  145. 0x64, //page3,
  146. 0x20, //page4,
  147. 0x40, //page5, //fps=0,7,2024年7月16日
  148. 0x60, //page6,
  149. 0x04, //page7,
  150. 0x00, //page8,
  151. 0x00, //page9,
  152. 0x00, //page10,
  153. 0x00 //page11,
  154. };
  155. const uint8_t ACQ_Tab[]=
  156. {
  157. 0x03,0x50, 0x03,0x50, 0x03,0x50, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x00, //0c00~0x0F,
  158. 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x02,0xB0, 0x03,0x20, 0x02,0xc0, 0x02,0x80, 0x03,0xF0,
  159. 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x03,0x20, 0x03,0x00, 0x03,0x20, 0x02,0xa0, //0x10~0x1F
  160. 0x03,0x60, 0x02,0x80, 0x03,0x30, 0x03,0x40, 0x03,0x50, 0x03,0x40, 0x03,0x50, 0x03,0x00
  161. };
  162. #endif
  163. #ifdef DR_2Mbps
  164. const uint8_t A5133_RFConfigTab_Main[]=
  165. {
  166. 0x00, //RESET register,
  167. 0x62, //MODE register,
  168. 0x00, //CALIBRATION register,
  169. 0x3F, //FIFO1 register,
  170. 0x00, //FIFO2 register,
  171. 0x00, //FIFO register,
  172. 0x00, //IDDATA register,
  173. 0x00, //RCOSC1 register,
  174. 0x00, //RCOSC2 register,
  175. 0x0C, //RCOSC3 register,
  176. 0x02, //CKO register,
  177. 0x01, //GPIO1 register
  178. 0x1D, //GPIO2 register,
  179. 0x1F, //DATARATECLOCK register,
  180. 0x00, //PLL1 register,
  181. 0x1E, //PLL2 register,
  182. 0x59, //PLL3 register,
  183. 0x74, //PLL4 register,
  184. 0x01, //PLL5 register,
  185. 0x32, //ChannelGroup1 register,
  186. 0x64, //ChannelGroup1 register,
  187. 0x2C, //TX1 register,
  188. 0x40, //TX2 register,
  189. 0x1B, //DELAY1 register,
  190. 0x40, //DELAY2 register,
  191. 0x70, //RX register,
  192. 0x7B, //RXGAIN1 register,
  193. 0xC0, //RXGAIN2 register,
  194. 0x1C, //RXGAIN3 register,
  195. 0xCA, //RXGAIN4 register,
  196. 0x00, //RSSI register,
  197. 0xC9, //ADC register,
  198. 0x00, //CODE1 register,
  199. 0x00, //CODE2 register,
  200. 0x00, //CODE3 register,
  201. 0xA4, //IFCAL1 register,
  202. 0x01, //IFCAL2 register,
  203. 0x4F, //VCOCCAL register,
  204. 0xC0, //VCOCAL1 register,
  205. 0x80, //VCOCAL2 register,
  206. 0x30, //VCO deviation 1 register,
  207. 0x00, //VCO deviation 2 register,
  208. 0x00, //DSA register,
  209. 0xFF, //VCO Modulation delay register,
  210. 0x40, //BATTERY register,
  211. 0xA4, //TXTEST register,
  212. 0x57, //RXDEM1 register,
  213. 0x74, //RXDEM2 register,
  214. 0xF3, //CPC1 register,
  215. 0x73, //CPC2 register,
  216. 0x4D, //CRYSTAL register,
  217. 0x15, //PLLTEST register,
  218. 0x0F, //VCOTEST register,
  219. 0x00, //RF Analog register,
  220. 0x00, //Key data register,
  221. 0x11, //Channel select register,
  222. 0x00, //ROM register,
  223. 0x00, //DataRate register,
  224. 0x00, //FCR register,
  225. 0x00, //ARD register,
  226. 0x00, //AFEP register,
  227. 0x00, //FCB register,
  228. 0x00, //KEYC register,
  229. 0x00 //USID register,
  230. };
  231. const uint8_t A5133_RFConfigTab_Addr0x20[]=
  232. {
  233. 0x04, //page0,
  234. 0x00, //page1,
  235. 0x00, //Page2,
  236. 0x00, //page3,
  237. 0x00, //page4,
  238. 0x00, //page5,
  239. 0x00, //page6,
  240. 0x00, //page7,
  241. 0x00, //page8,
  242. 0x00, //page9,
  243. 0x02, //page10,
  244. 0x00, //page11,
  245. 0x00 //page12,
  246. };
  247. const uint8_t A5133_RFConfigTab_Addr0x21[]=
  248. {
  249. 0x09, //page0,
  250. 0x00, //page1,
  251. 0x00, //Page2,
  252. 0x00, //page3,
  253. 0x00, //page4,
  254. 0x00, //page5,
  255. 0xC0, //page6,
  256. 0x00, //page7,
  257. 0x7C, //page8,
  258. 0x4F, //page9,
  259. 0x01, //page10
  260. 0x43, //page11
  261. 0x3C //page12
  262. };
  263. const uint8_t A5133_RFConfigTab_Addr0x22[]=
  264. {
  265. 0x00, //page0,
  266. 0x10, //page1,
  267. 0x00, //Page2,
  268. 0x10, //page3,
  269. 0x00, //page4,
  270. 0x04 //page5,
  271. };
  272. const uint8_t A5133_RFConfigTab_Addr0x2A[]=
  273. {
  274. 0x00, //page0,
  275. 0x01, //page1,
  276. 0xF0, //Page2,
  277. 0x80, //page3,
  278. 0x80, //page4,
  279. 0x48, //page5,
  280. 0x07, //page6,
  281. 0xC0, //page7,
  282. 0x3A, //page8,
  283. 0x3E, //page9,
  284. 0xE8, //page10,
  285. 0x80, //page11,
  286. 0x00 //page12,
  287. };
  288. const uint8_t A5133_RFConfigTab_Addr0x38[]=
  289. {
  290. 0x8C, //page0,
  291. 0x53, //page1,
  292. 0x1E, //page2,
  293. 0x64, //page3,
  294. 0x1A, //page4,
  295. 0x40, //page5,
  296. 0x60, //page6,
  297. 0x04, //page7,
  298. 0x00, //page8,
  299. 0x00, //page9,
  300. 0x00, //page10,
  301. 0x00 //page11,
  302. };
  303. const uint8_t ACQ_Tab[]=
  304. {
  305. 0x03,0x50, 0x03,0x50, 0x03,0x50, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x00, //0c00~0x0F,
  306. 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x02,0xB0, 0x03,0x20, 0x02,0xc0, 0x02,0x80, 0x03,0xF0,
  307. 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x03,0x20, 0x03,0x00, 0x03,0x20, 0x02,0xa0, //0x10~0x1F
  308. 0x03,0x60, 0x02,0x80, 0x03,0x30, 0x03,0x40, 0x03,0x50, 0x03,0x40, 0x03,0x50, 0x03,0x00
  309. };
  310. #endif
  311. #ifdef DR_1Mbps
  312. const uint8_t A5133_RFConfigTab_Main[]=
  313. {
  314. 0x00, //RESET register,
  315. 0x62, //MODE register,
  316. 0x00, //CALIBRATION register,
  317. 0x3F, //FIFO1 register,
  318. 0x00, //FIFO2 register,
  319. 0x00, //FIFO register,
  320. 0x00, //IDDATA register,
  321. 0x00, //RCOSC1 register,
  322. 0x00, //RCOSC2 register,
  323. 0x0C, //RCOSC3 register,
  324. 0x02, //CKO register,
  325. 0x01, //GPIO1 register
  326. 0x1D, //GPIO2 register,
  327. 0x1F, //DATARATECLOCK register,
  328. 0x00, //PLL1 register,
  329. 0x1E, //PLL2 register,
  330. 0x59, //PLL3 register,
  331. 0x74, //PLL4 register,
  332. 0x01, //PLL5 register,
  333. 0x32, //ChannelGroup1 register,
  334. 0x64, //ChannelGroup1 register,
  335. 0x2B, //TX1 register,
  336. 0x40, //TX2 register,
  337. 0x1B, //DELAY1 register,
  338. 0x40, //DELAY2 register,
  339. 0x70, //RX register,
  340. 0x7B, //RXGAIN1 register,
  341. 0xC0, //RXGAIN2 register,
  342. 0x0C, //RXGAIN3 register,
  343. 0xCA, //RXGAIN4 register,
  344. 0x00, //RSSI register,
  345. 0xC9, //ADC register,
  346. 0x00, //CODE1 register,
  347. 0x00, //CODE2 register,
  348. 0x00, //CODE3 register,
  349. 0x84, //IFCAL1 register,
  350. 0x01, //IFCAL2 register,
  351. 0x4F, //VCOCCAL register,
  352. 0xC0, //VCOCAL1 register,
  353. 0x80, //VCOCAL2 register,
  354. 0x10, //VCO deviation 1 register,
  355. 0x00, //VCO deviation 2 register,
  356. 0x00, //DSA register,
  357. 0xC0, //VCO Modulation delay register,
  358. 0x40, //BATTERY register,
  359. 0xA4, //TXTEST register,
  360. 0x57, //RXDEM1 register,
  361. 0x74, //RXDEM2 register,
  362. 0xF3, //CPC1 register,
  363. 0x33, //CPC2 register,
  364. 0x4D, //CRYSTAL register,
  365. 0x15, //PLLTEST register,
  366. 0x0F, //VCOTEST register,
  367. 0x00, //RF Analog register,
  368. 0x00, //Key data register,
  369. 0x01, //Channel select register,
  370. 0x00, //ROM register,
  371. 0x00, //DataRate register,
  372. 0x00, //FCR register,
  373. 0x00, //ARD register,
  374. 0x00, //AFEP register,
  375. 0x00, //FCB register,
  376. 0x00, //KEYC register,
  377. 0x00 //USID register,
  378. };
  379. const uint8_t A5133_RFConfigTab_Addr0x20[]=
  380. {
  381. 0x04, //page0,
  382. 0x00, //page1,
  383. 0x00, //Page2,
  384. 0x00, //page3,
  385. 0x00, //page4,
  386. 0x00, //page5,
  387. 0x00, //page6,
  388. 0x00, //page7,
  389. 0x00, //page8,
  390. 0x00, //page9,
  391. 0x02, //page10,
  392. 0x00, //page11,
  393. 0x00 //page12,
  394. };
  395. const uint8_t A5133_RFConfigTab_Addr0x21[]=
  396. {
  397. 0x09, //page0,
  398. 0x00, //page1,
  399. 0x00, //Page2,
  400. 0x00, //page3,
  401. 0x00, //page4,
  402. 0x00, //page5,
  403. 0xC0, //page6,
  404. 0x00, //page7,
  405. 0x7C, //page8,
  406. 0x4F, //page9,
  407. 0x01, //page10
  408. 0x43, //page11
  409. 0x54 //page12
  410. };
  411. const uint8_t A5133_RFConfigTab_Addr0x22[]=
  412. {
  413. 0x00, //page0,
  414. 0x10, //page1,
  415. 0x00, //Page2,
  416. 0x10, //page3,
  417. 0x00, //page4,
  418. 0x04 //page5,
  419. };
  420. const uint8_t A5133_RFConfigTab_Addr0x2A[]=
  421. {
  422. 0x00, //page0,
  423. 0x01, //page1,
  424. 0xF0, //Page2,
  425. 0x80, //page3,
  426. 0x80, //page4,
  427. 0x48, //page5,
  428. 0x07, //page6,
  429. 0xC0, //page7,
  430. 0x3A, //page8,
  431. 0x3E, //page9,
  432. 0xE8, //page10,
  433. 0x80, //page11,
  434. 0x00 //page12,
  435. };
  436. const uint8_t A5133_RFConfigTab_Addr0x38[]=
  437. {
  438. 0x8C, //page0,
  439. 0x53, //page1,
  440. 0x1E, //page2,
  441. 0x64, //page3,
  442. 0x1A, //page4,
  443. 0x40, //page5,
  444. 0x60, //page6,
  445. 0x04, //page7,
  446. 0x00, //page8,
  447. 0x00, //page9,
  448. 0x00, //page10,
  449. 0x00 //page11,
  450. };
  451. const uint8_t ACQ_Tab[]=
  452. {
  453. 0x03,0x50, 0x03,0x50, 0x03,0x50, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x00, //0c00~0x0F,
  454. 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x02,0xB0, 0x03,0x20, 0x02,0xc0, 0x02,0x80, 0x03,0xF0,
  455. 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x03,0x20, 0x03,0x00, 0x03,0x20, 0x02,0xa0, //0x10~0x1F
  456. 0x03,0x60, 0x02,0x80, 0x03,0x30, 0x03,0x40, 0x03,0x50, 0x03,0x40, 0x03,0x50, 0x03,0x00
  457. };
  458. #endif
  459. #ifdef DR_500Kbps
  460. const uint8_t A5133_RFConfigTab_Main[]=
  461. {
  462. 0x00, //RESET register,
  463. 0x62, //MODE register,
  464. 0x00, //CALIBRATION register,
  465. 0x3F, //FIFO1 register,
  466. 0x00, //FIFO2 register,
  467. 0x00, //FIFO register,
  468. 0x00, //IDDATA register,
  469. 0x00, //RCOSC1 register,
  470. 0x00, //RCOSC2 register,
  471. 0x0C, //RCOSC3 register,
  472. 0x02, //CKO register,
  473. 0x01, //GPIO1 register
  474. 0x1D, //GPIO2 register,
  475. 0x1F, //DATARATECLOCK register,
  476. 0x00, //PLL1 register,
  477. 0x1E, //PLL2 register,
  478. 0x59, //PLL3 register,
  479. 0x74, //PLL4 register,
  480. 0x01, //PLL5 register,
  481. 0x32, //ChannelGroup1 register,
  482. 0x64, //ChannelGroup1 register,
  483. 0x2B, //TX1 register,
  484. 0x40, //TX2 register,
  485. 0x1B, //DELAY1 register,
  486. 0x40, //DELAY2 register,
  487. 0x70, //RX register,
  488. 0x7B, //RXGAIN1 register,
  489. 0xC0, //RXGAIN2 register,
  490. 0x0C, //RXGAIN3 register,
  491. 0xCA, //RXGAIN4 register,
  492. 0x00, //RSSI register,
  493. 0xC9, //ADC register,
  494. 0x00, //CODE1 register,
  495. 0x00, //CODE2 register,
  496. 0x00, //CODE3 register,
  497. 0x84, //IFCAL1 register,
  498. 0x01, //IFCAL2 register,
  499. 0x4F, //VCOCCAL register,
  500. 0xC0, //VCOCAL1 register,
  501. 0x80, //VCOCAL2 register,
  502. 0x10, //VCO deviation 1 register,
  503. 0x00, //VCO deviation 2 register,
  504. 0x00, //DSA register,
  505. 0xC0, //VCO Modulation delay register,
  506. 0x40, //BATTERY register,
  507. 0xA4, //TXTEST register,
  508. 0x57, //RXDEM1 register,
  509. 0x74, //RXDEM2 register,
  510. 0xF3, //CPC1 register,
  511. 0x73, //CPC2 register,
  512. 0x4D, //CRYSTAL register,
  513. 0x15, //PLLTEST register,
  514. 0x0F, //VCOTEST register,
  515. 0x00, //RF Analog register,
  516. 0x00, //Key data register,
  517. 0x01, //Channel select register,
  518. 0x00, //ROM register,
  519. 0x01, //DataRate register,
  520. 0x00, //FCR register,
  521. 0x00, //ARD register,
  522. 0x00, //AFEP register,
  523. 0x00, //FCB register,
  524. 0x00, //KEYC register,
  525. 0x00 //USID register,
  526. };
  527. const uint8_t A5133_RFConfigTab_Addr0x20[]=
  528. {
  529. 0x04, //page0,
  530. 0x00, //page1,
  531. 0x00, //Page2,
  532. 0x00, //page3,
  533. 0x00, //page4,
  534. 0x00, //page5,
  535. 0x00, //page6,
  536. 0x00, //page7,
  537. 0x00, //page8,
  538. 0x00, //page9,
  539. 0x02, //page10,
  540. 0x00, //page11,
  541. 0x00 //page12,
  542. };
  543. const uint8_t A5133_RFConfigTab_Addr0x21[]=
  544. {
  545. 0x09, //page0,
  546. 0x00, //page1,
  547. 0x00, //Page2,
  548. 0x00, //page3,
  549. 0x00, //page4,
  550. 0x00, //page5,
  551. 0xC0, //page6,
  552. 0x00, //page7,
  553. 0x7C, //page8,
  554. 0x4F, //page9,
  555. 0x01, //page10
  556. 0x43, //page11
  557. 0x3C //page12
  558. };
  559. const uint8_t A5133_RFConfigTab_Addr0x22[]=
  560. {
  561. 0x00, //page0,
  562. 0x10, //page1,
  563. 0x00, //Page2,
  564. 0x10, //page3,
  565. 0x00, //page4,
  566. 0x04 //page5,
  567. };
  568. const uint8_t A5133_RFConfigTab_Addr0x2A[]=
  569. {
  570. 0x00, //page0,
  571. 0x01, //page1,
  572. 0xF0, //Page2,
  573. 0x80, //page3,
  574. 0x80, //page4,
  575. 0x48, //page5,
  576. 0x07, //page6,
  577. 0xC0, //page7,
  578. 0x3A, //page8,
  579. 0x3E, //page9,
  580. 0xE8, //page10,
  581. 0x80, //page11,
  582. 0x00 //page12,
  583. };
  584. const uint8_t A5133_RFConfigTab_Addr0x38[]=
  585. {
  586. 0x8C, //page0,
  587. 0x53, //page1,
  588. 0x1E, //page2,
  589. 0x64, //page3,
  590. 0x1A, //page4,
  591. 0x40, //page5,
  592. 0x60, //page6,
  593. 0x04, //page7,
  594. 0x00, //page8,
  595. 0x00, //page9,
  596. 0x00, //page10,
  597. 0x00 //page11,
  598. };
  599. const uint8_t ACQ_Tab[]=
  600. {
  601. 0x03,0x50, 0x03,0x50, 0x03,0x50, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x03,0x00, //0c00~0x0F,
  602. 0x03,0x40, 0x03,0x40, 0x03,0x40, 0x02,0xB0, 0x03,0x20, 0x02,0xc0, 0x02,0x80, 0x03,0xF0,
  603. 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x02,0x80, 0x03,0x20, 0x03,0x00, 0x03,0x20, 0x02,0xa0, //0x10~0x1F
  604. 0x03,0x60, 0x02,0x80, 0x03,0x30, 0x03,0x40, 0x03,0x50, 0x03,0x40, 0x03,0x50, 0x03,0x00
  605. };
  606. #endif
  607. #endif