/* / _____) _ | | ( (____ _____ ____ _| |_ _____ ____| |__ \____ \| ___ | (_ _) ___ |/ ___) _ \ _____) ) ____| | | || |_| ____( (___| | | | (______/|_____)_|_|_| \__)_____)\____)_| |_| (C)2014 Semtech Description: SX1208 Register Description License: Revised BSD License, see LICENSE.TXT file include in the project Maintainer: Leo Xie, Jiapeng Li */ #ifndef __SX1208_REG_H #define __SX1208_REG_H /******************************************************************* ** SX1208 Internal registers Address ** *******************************************************************/ #define REG_FIFO 0x00 #define REG_OPMODE 0x01 #define REG_DATAMODUL 0x02 #define REG_BITRATEMSB 0x03 #define REG_BITRATELSB 0x04 #define REG_FDEVMSB 0x05 #define REG_FDEVLSB 0x06 #define REG_FRFMSB 0x07 #define REG_FRFMID 0x08 #define REG_FRFLSB 0x09 #define REG_OSC1 0x0A #define REG_AFCCTRL 0x0B // change from OSC2 to AFCCTRL #define REG_LOWBAT 0x0C #define REG_LISTEN1 0x0D #define REG_LISTEN2 0x0E #define REG_LISTEN3 0x0F #define REG_VERSION 0x10 #define REG_PALEVEL 0x11 #define REG_PARAMP 0x12 #define REG_OCP 0x13 #define REG_AGCREF 0x14 #define REG_AGCTHRESH1 0x15 #define REG_AGCTHRESH2 0x16 #define REG_AGCTHRESH3 0x17 #define REG_LNA 0x18 #define REG_RXBW 0x19 #define REG_AFCBW 0x1A #define REG_OOKPEAK 0x1B #define REG_OOKAVG 0x1C #define REG_OOKFIX 0x1D #define REG_AFCFEI 0x1E #define REG_AFCMSB 0x1F #define REG_AFCLSB 0x20 #define REG_FEIMSB 0x21 #define REG_FEILSB 0x22 #define REG_RSSICONFIG 0x23 #define REG_RSSIVALUE 0x24 #define REG_DIOMAPPING1 0x25 #define REG_DIOMAPPING2 0x26 #define REG_IRQFLAGS1 0x27 #define REG_IRQFLAGS2 0x28 #define REG_RSSITHRESH 0x29 #define REG_RXTIMEOUT1 0x2A #define REG_RXTIMEOUT2 0x2B #define REG_PREAMBLEMSB 0x2C #define REG_PREAMBLELSB 0x2D #define REG_SYNCCONFIG 0x2E #define REG_SYNCVALUE1 0x2F #define REG_SYNCVALUE2 0x30 #define REG_SYNCVALUE3 0x31 #define REG_SYNCVALUE4 0x32 #define REG_SYNCVALUE5 0x33 #define REG_SYNCVALUE6 0x34 #define REG_SYNCVALUE7 0x35 #define REG_SYNCVALUE8 0x36 #define REG_PACKETCONFIG1 0x37 #define REG_PAYLOADLENGTH 0x38 #define REG_NODEADRS 0x39 #define REG_BROADCASTADRS 0x3A #define REG_AUTOMODES 0x3B #define REG_FIFOTHRESH 0x3C #define REG_PACKETCONFIG2 0x3D #define REG_AESKEY1 0x3E #define REG_AESKEY2 0x3F #define REG_AESKEY3 0x40 #define REG_AESKEY4 0x41 #define REG_AESKEY5 0x42 #define REG_AESKEY6 0x43 #define REG_AESKEY7 0x44 #define REG_AESKEY8 0x45 #define REG_AESKEY9 0x46 #define REG_AESKEY10 0x47 #define REG_AESKEY11 0x48 #define REG_AESKEY12 0x49 #define REG_AESKEY13 0x4A #define REG_AESKEY14 0x4B #define REG_AESKEY15 0x4C #define REG_AESKEY16 0x4D #define REG_TEMP1 0x4E #define REG_TEMP2 0x4F #define REG_TESTLNA 0X58 // add Sep2014, test register for sensitivity boost #define REG_TCXO 0x59 // add for external TCXO Sep2014 #define REG_TEST_PA1 0x5A #define REG_TEST_PA2 0x5C #define REG_DAGC 0x6F // add for DAGC Sep2014 #define REG_AFCOFFSET 0x71 /******************************************************************* ** SX1208 bit control definition ** *******************************************************************/ // RegFIFO // RegOpMode //Reg0x01 #define RF_OPMODE_SEQUENCER_OFF 0x80 #define RF_OPMODE_SEQUENCER_ON 0x00 // Default #define RF_OPMODE_LISTEN_ON 0x40 #define RF_OPMODE_LISTEN_OFF 0x00 // Default #define RF_OPMODE_LISTENABORT 0x20 #define RF_OPMODE_MASK 0xE3 #define RF_OPMODE_SLEEP 0x00 #define RF_OPMODE_STANDBY 0x04 // Default #define RF_OPMODE_SYNTHESIZER 0x08 #define RF_OPMODE_TRANSMITTER 0x0C #define RF_OPMODE_RECEIVER 0x10 #define RF_OPMODE_RXTX_MASK (0xFD) #define RF_OPMODE_RXTX_TXHIGH 0x00 // Default #define RF_OPMODE_RXTX_RXHIGH 0x02 // #define RF_OPMODE_DUALRWON 0x01 // #define RF_OPMODE_DUALRWOFF 0x00 //Default // RegDataModul #define RF_DATAMODUL_DATAMODE_PACKET 0x00 // Default #define RF_DATAMODUL_DATAMODE_CONTINUOUS 0x40 #define RF_DATAMODUL_DATAMODE_CONTINUOUSNOBSYNC 0x60 #define RF_DATAMODUL_MODULATIONTYPE_FSK 0x00 // Default #define RF_DATAMODUL_MODULATIONTYPE_OOK 0x08 #define RF_DATAMODUL_MODULATIONSHAPING_00 0x00 // Default #define RF_DATAMODUL_MODULATIONSHAPING_01 0x01 #define RF_DATAMODUL_MODULATIONSHAPING_10 0x02 #define RF_DATAMODUL_MODULATIONSHAPING_11 0x03 // RegBitRate (bits/sec) #define RF_BITRATEMSB_1200 0x68 #define RF_BITRATELSB_1200 0x2B #define RF_BITRATEMSB_2400 0x34 #define RF_BITRATELSB_2400 0x15 #define RF_BITRATEMSB_4800 0x1A // Default #define RF_BITRATELSB_4800 0x0B // Default #define RF_BITRATEMSB_9600 0x0D #define RF_BITRATELSB_9600 0x05 #define RF_BITRATEMSB_10000 0x0C // for state grid #define RF_BITRATELSB_10000 0x80 //for state grid #define RF_BITRATEMSB_19200 0x06 #define RF_BITRATELSB_19200 0x83 #define RF_BITRATEMSB_38400 0x03 #define RF_BITRATELSB_38400 0x41 #define RF_BITRATEMSB_76800 0x01 #define RF_BITRATELSB_76800 0xA1 #define RF_BITRATEMSB_153600 0x00 #define RF_BITRATELSB_153600 0xD0 #define RF_BITRATEMSB_57600 0x02 #define RF_BITRATELSB_57600 0x2C #define RF_BITRATEMSB_115200 0x01 #define RF_BITRATELSB_115200 0x16 #define RF_BITRATEMSB_12500 0x0A #define RF_BITRATELSB_12500 0x00 #define RF_BITRATEMSB_25000 0x05 #define RF_BITRATELSB_25000 0x00 #define RF_BITRATEMSB_50000 0x02 #define RF_BITRATELSB_50000 0x80 #define RF_BITRATEMSB_100000 0x01 #define RF_BITRATELSB_100000 0x40 #define RF_BITRATEMSB_150000 0x00 #define RF_BITRATELSB_150000 0xD5 #define RF_BITRATEMSB_200000 0x00 #define RF_BITRATELSB_200000 0xA0 #define RF_BITRATEMSB_250000 0x00 #define RF_BITRATELSB_250000 0x80 #define RF_BITRATEMSB_300000 0x00 #define RF_BITRATELSB_300000 0x6B #define RF_BITRATEMSB_32768 0x03 #define RF_BITRATELSB_32768 0xD1 // RegFdev (Hz) #define RF_FDEVMSB_2000 0x00 #define RF_FDEVLSB_2000 0x21 #define RF_FDEVMSB_5000 0x00 // Default #define RF_FDEVLSB_5000 0x52 // Default #define RF_FDEVMSB_10000 0x00 #define RF_FDEVLSB_10000 0xA4 #define RF_FDEVMSB_15000 0x00 #define RF_FDEVLSB_15000 0xF6 #define RF_FDEVMSB_20000 0x01 #define RF_FDEVLSB_20000 0x48 #define RF_FDEVMSB_25000 0x01 //for state grid #define RF_FDEVLSB_25000 0x9A //for state grid #define RF_FDEVMSB_30000 0x01 #define RF_FDEVLSB_30000 0xEC #define RF_FDEVMSB_35000 0x02 #define RF_FDEVLSB_35000 0x3D #define RF_FDEVMSB_40000 0x02 #define RF_FDEVLSB_40000 0x8F #define RF_FDEVMSB_45000 0x02 #define RF_FDEVLSB_45000 0xE1 #define RF_FDEVMSB_50000 0x03 #define RF_FDEVLSB_50000 0x33 #define RF_FDEVMSB_55000 0x03 #define RF_FDEVLSB_55000 0x85 #define RF_FDEVMSB_60000 0x03 #define RF_FDEVLSB_60000 0xD7 #define RF_FDEVMSB_65000 0x04 #define RF_FDEVLSB_65000 0x29 #define RF_FDEVMSB_70000 0x04 #define RF_FDEVLSB_70000 0x7B #define RF_FDEVMSB_75000 0x04 #define RF_FDEVLSB_75000 0xCD #define RF_FDEVMSB_80000 0x05 #define RF_FDEVLSB_80000 0x1F #define RF_FDEVMSB_85000 0x05 #define RF_FDEVLSB_85000 0x71 #define RF_FDEVMSB_90000 0x05 #define RF_FDEVLSB_90000 0xC3 #define RF_FDEVMSB_95000 0x06 #define RF_FDEVLSB_95000 0x14 #define RF_FDEVMSB_100000 0x06 #define RF_FDEVLSB_100000 0x66 #define RF_FDEVMSB_110000 0x07 #define RF_FDEVLSB_110000 0x0A #define RF_FDEVMSB_120000 0x07 #define RF_FDEVLSB_120000 0xAE #define RF_FDEVMSB_130000 0x08 #define RF_FDEVLSB_130000 0x52 #define RF_FDEVMSB_140000 0x08 #define RF_FDEVLSB_140000 0xF6 #define RF_FDEVMSB_150000 0x09 #define RF_FDEVLSB_150000 0x9A #define RF_FDEVMSB_160000 0x0A #define RF_FDEVLSB_160000 0x3D #define RF_FDEVMSB_170000 0x0A #define RF_FDEVLSB_170000 0xE1 #define RF_FDEVMSB_180000 0x0B #define RF_FDEVLSB_180000 0x85 #define RF_FDEVMSB_190000 0x0C #define RF_FDEVLSB_190000 0x29 #define RF_FDEVMSB_200000 0x0C #define RF_FDEVLSB_200000 0xCD #define RF_FDEVMSB_210000 0x0D #define RF_FDEVLSB_210000 0x71 #define RF_FDEVMSB_220000 0x0E #define RF_FDEVLSB_220000 0x14 #define RF_FDEVMSB_230000 0x0E #define RF_FDEVLSB_230000 0xB8 #define RF_FDEVMSB_240000 0x0F #define RF_FDEVLSB_240000 0x5C #define RF_FDEVMSB_250000 0x10 #define RF_FDEVLSB_250000 0x00 #define RF_FDEVMSB_260000 0x10 #define RF_FDEVLSB_260000 0xA4 #define RF_FDEVMSB_270000 0x11 #define RF_FDEVLSB_270000 0x48 #define RF_FDEVMSB_280000 0x11 #define RF_FDEVLSB_280000 0xEC #define RF_FDEVMSB_290000 0x12 #define RF_FDEVLSB_290000 0x8F #define RF_FDEVMSB_300000 0x13 #define RF_FDEVLSB_300000 0x33 // RegFrf (MHz) #define RF_FRFMSB_314 0x4E #define RF_FRFMID_314 0x80 #define RF_FRFLSB_314 0x00 #define RF_FRFMSB_315 0x4E #define RF_FRFMID_315 0xC0 #define RF_FRFLSB_315 0x00 #define RF_FRFMSB_316 0x4F #define RF_FRFMID_316 0x00 #define RF_FRFLSB_316 0x00 #define RF_FRFMSB_433 0x6C #define RF_FRFMID_433 0x40 #define RF_FRFLSB_433 0x00 #define RF_FRFMSB_434 0x6C #define RF_FRFMID_434 0x80 #define RF_FRFLSB_434 0x00 #define RF_FRFMSB_435 0x6C #define RF_FRFMID_435 0xC0 #define RF_FRFLSB_435 0x00 #define RF_FRFMSB_470 0x75 #define RF_FRFMID_470 0x80 #define RF_FRFLSB_470 0x00 #define RF_FRFMSB_471 0x75 #define RF_FRFMID_471 0xC0 #define RF_FRFLSB_471 0x00 #define RF_FRFMSB_472 0x76 #define RF_FRFMID_472 0x00 #define RF_FRFLSB_472 0x00 #define RF_FRFMSB_473 0x76 #define RF_FRFMID_473 0x40 #define RF_FRFLSB_473 0x00 #define RF_FRFMSB_474 0x76 #define RF_FRFMID_474 0x80 #define RF_FRFLSB_474 0x00 #define RF_FRFMSB_475 0x76 #define RF_FRFMID_475 0xC0 #define RF_FRFLSB_475 0x00 #define RF_FRFMSB_476M3 0x77 #define RF_FRFMID_476M3 0x13 #define RF_FRFLSB_476M3 0x33 #define RF_FRFMSB_915 0xE4 // Invalid in SX1208 #define RF_FRFMID_915 0xC0 // Invalid in SX1208 #define RF_FRFLSB_915 0x00 // Invalid in SX1208 // RegOsc1 #define RF_OSC1_RCCAL_START 0x80 #define RF_OSC1_RCCAL_DONE 0x40 // RegAFCCTRL //reg0x0B #define RF_AFCCTRL_LOWBETA_ON 0x20 //Add for SX1208,SEP 2014 #define RF_AFCCTRL_LOWBETA_OFF 0x00 //Add for SX1208,SEP 2014 #define RF_AFCCTRL_AESSTART 0x10 //Add for SX1208,SEP 2014 #define RF_AFCCTRL_AESENCRYPT_ON 0x08 //Add for SX1208,SEP 2014 #define RF_AFCCTRL_AESENCRYPT_OFF 0x00 //Add for SX1208,SEP 2014 #define RF_AFCCTRL_PREAMBLEDETECT 0x01 //will be set when preamble is detected. Add for SX1208,SEP 2014 // RegLowBat //reg0x0C #define RF_LOWBAT_MONITOR 0x10 #define RF_LOWBAT_ON 0x08 #define RF_LOWBAT_OFF 0x00 // Default #define RF_LOWBAT_TRIM_1695 0x00 #define RF_LOWBAT_TRIM_1764 0x01 #define RF_LOWBAT_TRIM_1835 0x02 // Default #define RF_LOWBAT_TRIM_1905 0x03 #define RF_LOWBAT_TRIM_1976 0x04 #define RF_LOWBAT_TRIM_2045 0x05 #define RF_LOWBAT_TRIM_2116 0x06 #define RF_LOWBAT_TRIM_2185 0x07 // RegListen1 #define RF_LISTEN1_RESOL_64 0x50 #define RF_LISTEN1_RESOL_4100 0xA0 // Default #define RF_LISTEN1_RESOL_262000 0xF0 #define RF_LISTEN1_CRITERIA_RSSI 0x00 // Default #define RF_LISTEN1_CRITERIA_RSSIANDSYNC 0x08 #define RF_LISTEN1_END_00 0x00 #define RF_LISTEN1_END_01 0x02 // Default #define RF_LISTEN1_END_10 0x04 // RegListen2 #define RF_LISTEN2_COEFIDLE_VALUE 0xF5 // Default // RegListen3 #define RF_LISTEN3_COEFRX_VALUE 0x20 // Default // RegVersion (Read Only) // RegPaLevel #define RF_PALEVEL_PA0_MASK 0x7F #define RF_PALEVEL_PA0_ON 0x80 // Default #define RF_PALEVEL_PA0_OFF 0x00 #define RF_PALEVEL_PA1_MASK 0xBF #define RF_PALEVEL_PA1_ON 0x40 #define RF_PALEVEL_PA1_OFF 0x00 // Default #define RF_PALEVEL_PA2_MASK 0xDF #define RF_PALEVEL_PA2_ON 0x20 #define RF_PALEVEL_PA2_OFF 0x00 // Default #define RF_PALEVEL_OUTPUTPOWER_00000 0x00 #define RF_PALEVEL_OUTPUTPOWER_00001 0x01 #define RF_PALEVEL_OUTPUTPOWER_00010 0x02 #define RF_PALEVEL_OUTPUTPOWER_00011 0x03 #define RF_PALEVEL_OUTPUTPOWER_00100 0x04 #define RF_PALEVEL_OUTPUTPOWER_00101 0x05 #define RF_PALEVEL_OUTPUTPOWER_00110 0x06 #define RF_PALEVEL_OUTPUTPOWER_00111 0x07 #define RF_PALEVEL_OUTPUTPOWER_01000 0x08 #define RF_PALEVEL_OUTPUTPOWER_01001 0x09 #define RF_PALEVEL_OUTPUTPOWER_01010 0x0A #define RF_PALEVEL_OUTPUTPOWER_01011 0x0B #define RF_PALEVEL_OUTPUTPOWER_01100 0x0C #define RF_PALEVEL_OUTPUTPOWER_01101 0x0D #define RF_PALEVEL_OUTPUTPOWER_01110 0x0E #define RF_PALEVEL_OUTPUTPOWER_01111 0x0F #define RF_PALEVEL_OUTPUTPOWER_10000 0x10 #define RF_PALEVEL_OUTPUTPOWER_10001 0x11 #define RF_PALEVEL_OUTPUTPOWER_10010 0x12 #define RF_PALEVEL_OUTPUTPOWER_10011 0x13 #define RF_PALEVEL_OUTPUTPOWER_10100 0x14 #define RF_PALEVEL_OUTPUTPOWER_10101 0x15 #define RF_PALEVEL_OUTPUTPOWER_10110 0x16 #define RF_PALEVEL_OUTPUTPOWER_10111 0x17 #define RF_PALEVEL_OUTPUTPOWER_11000 0x18 #define RF_PALEVEL_OUTPUTPOWER_11001 0x19 #define RF_PALEVEL_OUTPUTPOWER_11010 0x1A #define RF_PALEVEL_OUTPUTPOWER_11011 0x1B #define RF_PALEVEL_OUTPUTPOWER_11100 0x1C #define RF_PALEVEL_OUTPUTPOWER_11101 0x1D #define RF_PALEVEL_OUTPUTPOWER_11110 0x1E #define RF_PALEVEL_OUTPUTPOWER_11111 0x1F // Default // RegPaRamp #define RF_PARAMP_3400 0x00 #define RF_PARAMP_2000 0x01 #define RF_PARAMP_1000 0x02 #define RF_PARAMP_500 0x03 #define RF_PARAMP_250 0x04 #define RF_PARAMP_125 0x05 #define RF_PARAMP_100 0x06 #define RF_PARAMP_62 0x07 #define RF_PARAMP_50 0x08 #define RF_PARAMP_40 0x09 // Default #define RF_PARAMP_31 0x0A #define RF_PARAMP_25 0x0B #define RF_PARAMP_20 0x0C #define RF_PARAMP_15 0x0D #define RF_PARAMP_12 0x0E #define RF_PARAMP_10 0x0F // RegOcp #define RF_OCP_OFF 0x00 #define RF_OCP_ON 0x10 // Default #define RF_OCP_TRIM_45 0x00 #define RF_OCP_TRIM_50 0x01 #define RF_OCP_TRIM_55 0x02 #define RF_OCP_TRIM_60 0x03 #define RF_OCP_TRIM_65 0x04 #define RF_OCP_TRIM_70 0x05 #define RF_OCP_TRIM_75 0x06 #define RF_OCP_TRIM_80 0x07 #define RF_OCP_TRIM_85 0x08 #define RF_OCP_TRIM_90 0x09 #define RF_OCP_TRIM_95 0x0A #define RF_OCP_TRIM_100 0x0B // Default #define RF_OCP_TRIM_105 0x0C #define RF_OCP_TRIM_110 0x0D #define RF_OCP_TRIM_115 0x0E #define RF_OCP_TRIM_120 0x0F // RegAgcRef reserved registers // RegLna //Reg0x18 #define RF_LNA_ZIN_50 0x00 #define RF_LNA_ZIN_200 0x80 // Default #define RF_LNA_LOWPOWER_OFF 0x00 // Default #define RF_LNA_LOWPOWER_ON 0x40 #define RF_LNA_CURRENTGAIN 0x38 // read only Sep 2014 #define RF_LNA_GAINSELECT_AUTO 0x00 // Default #define RF_LNA_GAINSELECT_MAX 0x01 #define RF_LNA_GAINSELECT_MAXMINUS6 0x02 #define RF_LNA_GAINSELECT_MAXMINUS12 0x03 #define RF_LNA_GAINSELECT_MAXMINUS24 0x04 #define RF_LNA_GAINSELECT_MAXMINUS36 0x05 #define RF_LNA_GAINSELECT_MAXMINUS48 0x06 // RegRxBw //Reg0x19 #define RF_RXBW_DCCFREQ_000 0x00 #define RF_RXBW_DCCFREQ_001 0x20 #define RF_RXBW_DCCFREQ_010 0x40 // Default #define RF_RXBW_DCCFREQ_011 0x60 #define RF_RXBW_DCCFREQ_100 0x80 #define RF_RXBW_DCCFREQ_101 0xA0 #define RF_RXBW_DCCFREQ_110 0xC0 #define RF_RXBW_DCCFREQ_111 0xE0 #define RF_RXBW_MANT_16 0x00 #define RF_RXBW_MANT_20 0x08 #define RF_RXBW_MANT_24 0x10 // Default #define RF_RXBW_EXP_0 0x00 #define RF_RXBW_EXP_1 0x01 #define RF_RXBW_EXP_2 0x02 #define RF_RXBW_EXP_3 0x03 #define RF_RXBW_EXP_4 0x04 #define RF_RXBW_EXP_5 0x05 // Default #define RF_RXBW_EXP_6 0x06 #define RF_RXBW_EXP_7 0x07 // RegAfcBw //Reg0x1A #define RF_AFCBW_DCCFREQAFC_000 0x00 #define RF_AFCBW_DCCFREQAFC_001 0x20 #define RF_AFCBW_DCCFREQAFC_010 0x40 #define RF_AFCBW_DCCFREQAFC_011 0x60 #define RF_AFCBW_DCCFREQAFC_100 0x80 // Default #define RF_AFCBW_DCCFREQAFC_101 0xA0 #define RF_AFCBW_DCCFREQAFC_110 0xC0 #define RF_AFCBW_DCCFREQAFC_111 0xE0 #define RF_AFCBW_MANTAFC_16 0x00 #define RF_AFCBW_MANTAFC_20 0x08 // Default #define RF_AFCBW_MANTAFC_24 0x10 #define RF_AFCBW_EXPAFC_0 0x00 #define RF_AFCBW_EXPAFC_1 0x01 #define RF_AFCBW_EXPAFC_2 0x02 #define RF_AFCBW_EXPAFC_3 0x03 // Default #define RF_AFCBW_EXPAFC_4 0x04 #define RF_AFCBW_EXPAFC_5 0x05 #define RF_AFCBW_EXPAFC_6 0x06 #define RF_AFCBW_EXPAFC_7 0x07 // RegOokPeak //Reg0x1B #define RF_OOKPEAK_THRESHTYPE_FIXED 0x00 #define RF_OOKPEAK_THRESHTYPE_PEAK 0x40 // Default #define RF_OOKPEAK_THRESHTYPE_AVERAGE 0x80 #define RF_OOKPEAK_PEAKTHRESHSTEP_000 0x00 // Default #define RF_OOKPEAK_PEAKTHRESHSTEP_001 0x08 #define RF_OOKPEAK_PEAKTHRESHSTEP_010 0x10 #define RF_OOKPEAK_PEAKTHRESHSTEP_011 0x18 #define RF_OOKPEAK_PEAKTHRESHSTEP_100 0x20 #define RF_OOKPEAK_PEAKTHRESHSTEP_101 0x28 #define RF_OOKPEAK_PEAKTHRESHSTEP_110 0x30 #define RF_OOKPEAK_PEAKTHRESHSTEP_111 0x38 #define RF_OOKPEAK_PEAKTHRESHDEC_000 0x00 // Default #define RF_OOKPEAK_PEAKTHRESHDEC_001 0x01 #define RF_OOKPEAK_PEAKTHRESHDEC_010 0x02 #define RF_OOKPEAK_PEAKTHRESHDEC_011 0x03 #define RF_OOKPEAK_PEAKTHRESHDEC_100 0x04 #define RF_OOKPEAK_PEAKTHRESHDEC_101 0x05 #define RF_OOKPEAK_PEAKTHRESHDEC_110 0x06 #define RF_OOKPEAK_PEAKTHRESHDEC_111 0x07 // RegOokAvg //Reg0x1C #define RF_OOKAVG_AVERAGETHRESHFILT_00 0x00 #define RF_OOKAVG_AVERAGETHRESHFILT_01 0x40 #define RF_OOKAVG_AVERAGETHRESHFILT_10 0x80 // Default #define RF_OOKAVG_AVERAGETHRESHFILT_11 0xC0 // RegOokFix #define RF_OOKFIX_FIXEDTHRESH_VALUE 0x06 // Default // RegAfcFei #define RF_AFCFEI_FEI_DONE 0x40 //read only #define RF_AFCFEI_FEI_START 0x20 #define RF_AFCFEI_AFC_DONE 0x10 //read only #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x08 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default #define RF_AFCFEI_AFCAUTO_ON 0x04 #define RF_AFCFEI_AFCAUTO_OFF 0x00 // Default #define RF_AFCFEI_AFC_CLEAR 0x02 #define RF_AFCFEI_AFC_START 0x01 // RegAfcMsb (Read Only) // RegAfcLsb (Read Only) // RegFeiMsb (Read Only) // RegFeiLsb (Read Only) // RegRssiConfig //Reg0x23 #define RF_RSSI_FASTRX_ON 0x08 #define RF_RSSI_FASTRX_OFF 0x00 // Default #define RF_RSSI_DONE 0x02 //read only #define RF_RSSI_START 0x01 // RegRssiValue (Read Only) // RegDioMapping1 //reg0x25 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default #define RF_DIOMAPPING1_DIO0_01 0x40 #define RF_DIOMAPPING1_DIO0_10 0x80 #define RF_DIOMAPPING1_DIO0_11 0xC0 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default #define RF_DIOMAPPING1_DIO1_01 0x10 #define RF_DIOMAPPING1_DIO1_10 0x20 #define RF_DIOMAPPING1_DIO1_11 0x30 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default #define RF_DIOMAPPING1_DIO2_01 0x04 #define RF_DIOMAPPING1_DIO2_10 0x08 #define RF_DIOMAPPING1_DIO2_11 0x0C #define RF_DIOMAPPING1_DIO3_00 0x00 // Default #define RF_DIOMAPPING1_DIO3_01 0x01 #define RF_DIOMAPPING1_DIO3_10 0x02 #define RF_DIOMAPPING1_DIO3_11 0x03 #define RF_DIOMAPPING1_DIO0_CRC_OK RF_DIOMAPPING1_DIO0_00 #define RF_DIOMAPPING1_DIO0_PLD_RDY RF_DIOMAPPING1_DIO0_01 #define RF_DIOMAPPING1_DIO0_SYNC_ADDR RF_DIOMAPPING1_DIO0_10 #define RF_DIOMAPPING1_DIO0_RSSI RF_DIOMAPPING1_DIO0_11 #define RF_DIOMAPPING1_DIO0_PKT_SENT RF_DIOMAPPING1_DIO0_00 #define RF_DIOMAPPING1_DIO0_TX_RDY RF_DIOMAPPING1_DIO0_01 #define RF_DIOMAPPING1_DIO1_FIFO_LEVEL RF_DIOMAPPING1_DIO1_00 #define RF_DIOMAPPING1_DIO1_FIFO_FULL RF_DIOMAPPING1_DIO1_01 #define RF_DIOMAPPING1_DIO1_FIFO_NEMPTY RF_DIOMAPPING1_DIO1_10 #define RF_DIOMAPPING1_DIO1_TMO RF_DIOMAPPING1_DIO1_11 #define RF_DIOMAPPING1_DIO2_FIFO_NEMPTY RF_DIOMAPPING1_DIO2_00 #define RF_DIOMAPPING1_DIO3_FIFO_FULL RF_DIOMAPPING1_DIO3_00 #define RF_DIOMAPPING1_DIO3_PREAMBLEDETECT RF_DIOMAPPING1_DIO3_01 // add for SX1208,need to enable RF_DIOMAPPING2_MAP_PREAMBLEDETECT #define RF_DIOMAPPING1_DIO3_SYNC_ADDR RF_DIOMAPPING1_DIO3_10 #define RF_DIOMAPPING1_DIO4_TMO RF_DIOMAPPING1_DIO4_00 #define RF_DIOMAPPING1_DIO4_PREAMBLEDETECT RF_DIOMAPPING1_DIO4_01 // add for SX1208,need to enable RF_DIOMAPPING2_MAP_PREAMBLEDETECT #define RF_DIOMAPPING1_DIO4_RX_RDY RF_DIOMAPPING1_DIO4_10 // RegDioMapping2 //reg0x26 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default #define RF_DIOMAPPING2_DIO4_01 0x40 #define RF_DIOMAPPING2_DIO4_10 0x80 #define RF_DIOMAPPING2_DIO4_11 0xC0 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default #define RF_DIOMAPPING2_DIO5_01 0x10 #define RF_DIOMAPPING2_DIO5_10 0x20 #define RF_DIOMAPPING2_DIO5_11 0x30 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x08 //add for SX1208 Sep 2014 #define RF_DIOMAPPING2_MAP_RSSI 0x00 //Default, add for SX1208 Sep 2014 #define RF_DIOMAPPING2_CLKOUT_32 0x00 #define RF_DIOMAPPING2_CLKOUT_16 0x01 #define RF_DIOMAPPING2_CLKOUT_8 0x02 #define RF_DIOMAPPING2_CLKOUT_4 0x03 #define RF_DIOMAPPING2_CLKOUT_2 0x04 #define RF_DIOMAPPING2_CLKOUT_1 0x05 #define RF_DIOMAPPING2_CLKOUT_RC 0x06 #define RF_DIOMAPPING2_CLKOUT_OFF 0x07 // Default // RegIrqFlags1 //reg0x27 #define RF_IRQFLAGS1_MODEREADY 0x80 #define RF_IRQFLAGS1_RXREADY 0x40 #define RF_IRQFLAGS1_TXREADY 0x20 #define RF_IRQFLAGS1_PLLLOCK 0x10 #define RF_IRQFLAGS1_RSSI 0x08 #define RF_IRQFLAGS1_TIMEOUT 0x04 #define RF_IRQFLAGS1_AUTOMODE 0x02 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01 // RegIrqFlags2 //reg0x28 #define RF_IRQFLAGS2_FIFOFULL 0x80 #define RF_IRQFLAGS2_FIFONOTEMPTY 0x40 #define RF_IRQFLAGS2_FIFOLEVEL 0x20 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10 #define RF_IRQFLAGS2_PACKETSENT 0x08 #define RF_IRQFLAGS2_PAYLOADREADY 0x04 #define RF_IRQFLAGS2_CRCOK 0x02 #define RF_IRQFLAGS2_LOWBAT 0x01 // RegRssiThresh //reg0x29 #define RF_RSSITHRESH_VALUE 0xE4 // Default // RegRxTimeout1 #define RF_RXTIMEOUT1_RXSTART_VALUE 0x00 // Default // RegRxTimeout2 #define RF_RXTIMEOUT2_RSSITHRESH_VALUE 0x00 // Default // RegPreamble //reg0x2c ~ reg0x2d #define RF_PREAMBLESIZE_MSB_VALUE 0x00 // Default #define RF_PREAMBLESIZE_LSB_VALUE 0x03 // Default // RegSyncConfig #define RF_SYNC_MASK 0x7F #define RF_SYNC_ON 0x80 // Default #define RF_SYNC_OFF 0x00 #define RF_SYNC_FIFOFILL_AUTO 0x00 // Default, fill FIFO when SyncAddress matched #define RF_SYNC_FIFOFILL_MANUAL 0x40 // always fill FIFO #define RF_SYNC_SIZE_MASK 0xC7 #define RF_SYNC_SIZE_1 0x00 #define RF_SYNC_SIZE_2 0x08 #define RF_SYNC_SIZE_3 0x10 #define RF_SYNC_SIZE_4 0x18 // Default #define RF_SYNC_SIZE_5 0x20 #define RF_SYNC_SIZE_6 0x28 #define RF_SYNC_SIZE_7 0x30 #define RF_SYNC_SIZE_8 0x38 #define RF_SYNC_TOL_0 0x00 // Default #define RF_SYNC_TOL_1 0x01 #define RF_SYNC_TOL_2 0x02 #define RF_SYNC_TOL_3 0x03 #define RF_SYNC_TOL_4 0x04 #define RF_SYNC_TOL_5 0x05 #define RF_SYNC_TOL_6 0x06 #define RF_SYNC_TOL_7 0x07 // RegSyncValue1-8 #define RF_SYNC_BYTE1_VALUE 0x00 // Default #define RF_SYNC_BYTE2_VALUE 0x00 // Default #define RF_SYNC_BYTE3_VALUE 0x00 // Default #define RF_SYNC_BYTE4_VALUE 0x00 // Default #define RF_SYNC_BYTE5_VALUE 0x00 // Default #define RF_SYNC_BYTE6_VALUE 0x00 // Default #define RF_SYNC_BYTE7_VALUE 0x00 // Default #define RF_SYNC_BYTE8_VALUE 0x00 // Default // RegPacketConfig1 //reg0x37 #define RF_PACKET1_FORMAT_MASK 0x7F // Default #define RF_PACKET1_FORMAT_FIXED 0x00 // Default #define RF_PACKET1_FORMAT_VARIABLE 0x80 #define RF_PACKET1_DCFREE_OFF 0x00 // Default #define RF_PACKET1_DCFREE_MANCHESTER 0x20 #define RF_PACKET1_DCFREE_WHITENING 0x40 #define RF_PACKET1_CRC_MASK 0xEF // Default #define RF_PACKET1_CRC_ON 0x10 // Default #define RF_PACKET1_CRC_OFF 0x00 #define RF_PACKET1_CRCAUTOCLEAR_MASK 0xF7 #define RF_PACKET1_CRCAUTOCLEAR_ON 0x00 // Default #define RF_PACKET1_CRCAUTOCLEAR_OFF 0x08 #define RF_PACKET1_ADRSFILTERING_OFF 0x00 // Default #define RF_PACKET1_ADRSFILTERING_NODE 0x02 #define RF_PACKET1_ADRSFILTERING_NODEBROADCAST 0x04 // RegPayloadLength //reg0x38 #define RF_PAYLOADLENGTH_VALUE 0x40 // Default // RegNodeAdrs #define RF_NODEADDRESS_VALUE 0x00 // RegBroadcastAdrs //reg0x3A #define RF_BROADCASTADDRESS_VALUE 0x00 // RegAutoModes #define RF_AUTOMODES_ENTER_OFF 0x00 // Default #define RF_AUTOMODES_ENTER_FIFONOTEMPTY 0x20 #define RF_AUTOMODES_ENTER_FIFOLEVEL 0x40 #define RF_AUTOMODES_ENTER_CRCOK 0x60 #define RF_AUTOMODES_ENTER_PAYLOADREADY 0x80 #define RF_AUTOMODES_ENTER_SYNCADRSMATCH 0xA0 #define RF_AUTOMODES_ENTER_PACKETSENT 0xC0 #define RF_AUTOMODES_ENTER_FIFOEMPTY 0xE0 #define RF_AUTOMODES_EXIT_OFF 0x00 // Default #define RF_AUTOMODES_EXIT_FIFOEMPTY 0x04 #define RF_AUTOMODES_EXIT_FIFOLEVEL 0x08 #define RF_AUTOMODES_EXIT_CRCOK 0x0C #define RF_AUTOMODES_EXIT_PAYLOADREADY 0x10 #define RF_AUTOMODES_EXIT_SYNCADRSMATCH 0x14 #define RF_AUTOMODES_EXIT_PACKETSENT 0x18 #define RF_AUTOMODES_EXIT_RXTIMEOUT 0x1C #define RF_AUTOMODES_INTERMEDIATE_SLEEP 0x00 // Default #define RF_AUTOMODES_INTERMEDIATE_STANDBY 0x01 #define RF_AUTOMODES_INTERMEDIATE_RECEIVER 0x02 #define RF_AUTOMODES_INTERMEDIATE_TRANSMITTER 0x03 // RegFifoThresh #define RF_FIFOTHRESH_TXSTART_FIFOTHRESH 0x00 //TX start when bytes in FIFO exceed FIFOThreshold #define RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY 0x80 // Default #define RF_FIFOTHRESH_VALUE 0x0F // Default // RegPacketConfig2 //reg0x3D #define RF_PACKET2_RXRESTARTDELAY_1BIT 0x00 // Default #define RF_PACKET2_RXRESTARTDELAY_2BITS 0x10 #define RF_PACKET2_RXRESTARTDELAY_4BITS 0x20 #define RF_PACKET2_RXRESTARTDELAY_8BITS 0x30 #define RF_PACKET2_RXRESTARTDELAY_16BITS 0x40 #define RF_PACKET2_RXRESTARTDELAY_32BITS 0x50 #define RF_PACKET2_RXRESTARTDELAY_64BITS 0x60 #define RF_PACKET2_RXRESTARTDELAY_128BITS 0x70 #define RF_PACKET2_RXRESTARTDELAY_256BITS 0x80 #define RF_PACKET2_RXRESTARTDELAY_512BITS 0x90 #define RF_PACKET2_RXRESTARTDELAY_1024BITS 0xA0 #define RF_PACKET2_RXRESTARTDELAY_2048BITS 0xB0 #define RF_PACKET2_RXRESTARTDELAY_NONE 0xC0 #define RF_PACKET2_RXRESTART 0x04 #define RF_PACKET2_AUTORXRESTART_ON 0x02 // Default #define RF_PACKET2_AUTORXRESTART_OFF 0x00 #define RF_PACKET2_AES_ON 0x01 #define RF_PACKET2_AES_OFF 0x00 // Default // RegAesKey1-16 #define RF_AESKEY1_VALUE 0x00 // Default #define RF_AESKEY2_VALUE 0x00 // Default #define RF_AESKEY3_VALUE 0x00 // Default #define RF_AESKEY4_VALUE 0x00 // Default #define RF_AESKEY5_VALUE 0x00 // Default #define RF_AESKEY6_VALUE 0x00 // Default #define RF_AESKEY7_VALUE 0x00 // Default #define RF_AESKEY8_VALUE 0x00 // Default #define RF_AESKEY9_VALUE 0x00 // Default #define RF_AESKEY10_VALUE 0x00 // Default #define RF_AESKEY11_VALUE 0x00 // Default #define RF_AESKEY12_VALUE 0x00 // Default #define RF_AESKEY13_VALUE 0x00 // Default #define RF_AESKEY14_VALUE 0x00 // Default #define RF_AESKEY15_VALUE 0x00 // Default #define RF_AESKEY16_VALUE 0x00 // Default //RegPreamble //Reg0x6C #define RF_PREAMBLE_DETECTOR_ON 0x80 // Add for SX1208, enable preamble detect #define RF_PREAMBLE_DETECTOR_OFF 0x00 // Default #define RF_PREAMBLE_DETECTOR_SIZE_1BYTE 0x00 // Add for SX1208, SEP 2014 #define RF_PREAMBLE_DETECTOR_SIZE_2BYTE 0x20 // Add for SX1208, SEP 2014 #define RF_PREAMBLE_DETECTOR_SIZE_3BYTE 0x40 // Add for SX1208, SEP 2014 #define RF_PREAMBLE_DETECTOR_SIZE_4BYTE 0x60 // Add for SX1208, SEP 2014 #define RF_PREAMBLE_DETECTOR_TOL 0X0A // default //RegDAGC //Reg0x6F #define RF_CONTINUOUS_DAGC_OFF 0X00 //Add for SX1208, SEP 2014 #define RF_CONTINUOUS_DAGC_ON_AFCLOWBETA 0X20 //Add for SX1208, SEP 2014 #define RF_CONTINUOUS_DAGC_ON 0X30 //Deafult,AFCLOWBETA OFF, Add for SX1208, SEP 2014 /******************************************************************* ** SX1208 initialisation register values definition ** *******************************************************************/ #define DEF_FIFO 0x00 // FIFO not to be initialized #define DEF_OPMODE 0x04 #define DEF_DATAMODUL 0x00 #define DEF_BITRATEMSB 0x1A #define DEF_BITRATELSB 0x0B #define DEF_FDEVMSB 0x00 #define DEF_FDEVLSB 0x52 #define DEF_FRFMSB 0x00 #define DEF_FRFMID 0x00 #define DEF_FRFLSB 0x00 #define DEF_OSC1 0x41 #define DEF_AFCCTRL 0x00 // Reserved #define DEF_LOWBAT 0x00 #define DEF_LISTEN1 0x00 #define DEF_LISTEN2 0x00 #define DEF_LISTEN3 0x00 #define DEF_VERSION 0x00 #define DEF_PALEVEL 0x00 #define DEF_PARAMP 0x00 #define DEF_OCP 0x00 #define DEF_AGCREF 0x00 #define DEF_AGCTHRESH1 0x00 #define DEF_AGCTHRESH2 0x00 #define DEF_AGCTHRESH3 0x00 #define DEF_LNA 0x00 #define DEF_RXBW 0x00 #define DEF_AFCBW 0x00 #define DEF_OOKPEAK 0x00 #define DEF_OOKAVG 0x00 #define DEF_OOKFIX 0x00 #define DEF_AFCFEI 0x00 #define DEF_AFCMSB 0x00 #define DEF_AFCLSB 0x00 #define DEF_FEIMSB 0x00 #define DEF_FEILSB 0x00 #define DEF_RSSICONFIG 0x00 #define DEF_RSSIVALUE 0x00 #define DEF_DIOMAPPING1 0x00 #define DEF_DIOMAPPING2 0x00 #define DEF_IRQFLAGS1 0x00 #define DEF_IRQFLAGS2 0x00 #define DEF_RSSITHRESH 0x00 #define DEF_RXTIMEOUT1 0x00 #define DEF_RXTIMEOUT2 0x00 #define DEF_PREAMBLEMSB 0x00 #define DEF_PREAMBLELSB 0x00 #define DEF_SYNCCONFIG 0x00 #define DEF_SYNCVALUE1 0x00 #define DEF_SYNCVALUE2 0x00 #define DEF_SYNCVALUE3 0x00 #define DEF_SYNCVALUE4 0x00 #define DEF_SYNCVALUE5 0x00 #define DEF_SYNCVALUE6 0x00 #define DEF_SYNCVALUE7 0x00 #define DEF_SYNCVALUE8 0x00 #define DEF_PACKETCONFIG1 0x00 #define DEF_PAYLOADLENGTH 0x00 #define DEF_NODEADRS 0x00 #define DEF_BROADCASTADRS 0x00 #define DEF_AUTOMODES 0x00 #define DEF_FIFOTHRESH 0x00 #define DEF_PACKETCONFIG2 0x00 #define DEF_AESKEY1 0x00 #define DEF_AESKEY2 0x00 #define DEF_AESKEY3 0x00 #define DEF_AESKEY4 0x00 #define DEF_AESKEY5 0x00 #define DEF_AESKEY6 0x00 #define DEF_AESKEY7 0x00 #define DEF_AESKEY8 0x00 #define DEF_AESKEY9 0x00 #define DEF_AESKEY10 0x00 #define DEF_AESKEY11 0x00 #define DEF_AESKEY12 0x00 #define DEF_AESKEY13 0x00 #define DEF_AESKEY14 0x00 #define DEF_AESKEY15 0x00 #define DEF_AESKEY16 0x00 #define DEF_TEMP1 0x00 #define DEF_TEMP2 0x00 #define DEF_TCXO 0x09 // add for external TCXO Sep2014 #define DEF_PREAMBLE 0x00 // add for preamble detection Sep2014 #define DEF_DAGC 0x30 // add for DAGC Sep2014 #define DEF_AFCOFFSET 0X00 //================================================================================================== #endif