A7169Config_433Mhz50kbps.h 3.6 KB

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  1. #ifndef _A7169CONFIG_433Mhz50kbps_h_
  2. #define _A7169CONFIG_433Mhz50kbps_h_
  3. #include <stdint.h>
  4. uint16_t A7169Config_433Mhz50kbps[]= //433MHz, 50kbps (IFBW = 50KHz, Fdev = 18.75KHz), Crystal=12.8MHz
  5. {
  6. 0x0003, //SYSTEM CLOCK register,
  7. 0x0821, //PLL1 register,
  8. 0xDA05, //PLL2 register, 433.301MHz
  9. 0x0000, //PLL3 register,
  10. 0x0A20, //PLL4 register,
  11. 0x0000, //PLL5 register,
  12. 0x0000, //PLL6 register,
  13. 0x0025, //CRYSTAL register,
  14. 0x0000, //PAGEA,
  15. 0x0000, //PAGEB,
  16. 0x18D0, //RX1 register, IFBW=50KHz
  17. 0x7009, //RX2 register, by preamble
  18. 0x4000, //ADC register,
  19. 0x0800, //PIN CONTROL register, Use Strobe CMD
  20. 0x6C00, //CALIBRATION register,
  21. 0x20C0 //MODE CONTROL register, Use FIFO mode
  22. };
  23. uint16_t A7169Config_PageA_433Mhz50kbps[]= //433MHz, 50kbps (IFBW = 50KHz, Fdev = 18.75KHz), Crystal=12.8MHz
  24. {
  25. 0xF606, //TX1 register, Fdev = 18.75kHz
  26. 0xFC00, //WOR1 register,
  27. 0xF811, //WOR2 register,
  28. 0x0907, //RFI register, Enable Tx Ramp up/down
  29. 0x8A10, //PM register, CST=1
  30. 0x0303, //RTH register,
  31. 0x400F, //AGC1 register,
  32. 0x0DC0, //AGC2 register,
  33. 0x0001, //GIO register, GIO1=WTR
  34. 0xFA01, //CKO register
  35. 0x0048, //VCB register,
  36. 0x6921, //CHG1 register, 430MHz
  37. 0x0F21, //CHG2 register, 435MHz
  38. 0x003F, //FIFO register, FEP=63+1=64bytes
  39. 0x1507, //CODE register, Preamble=4bytes, ID=4bytes
  40. 0x87E0 //WCAL register,
  41. };
  42. uint16_t A7169Config_PageB_433Mhz50kbps[]= //433MHz, 50kbps (IFBW = 50KHz, Fdev = 18.75KHz), Crystal=12.8MHz
  43. {
  44. 0x0337, //TX2 register,
  45. 0x8200, //IF1 register, Enable Auto-IF, IF=100KHz
  46. 0x0000, //IF2 register,
  47. 0x0000, //ACK register,
  48. 0x0000, //ART register,
  49. 0x3800, //SYN register,
  50. 0xF177, //RCCAL register,
  51. 0x0000, //ACKFIFO register,
  52. 0x0064, //PNCFG1 register,
  53. 0x0010, //PNCFG2 register,
  54. 0x0001, //PNCFG3 register,
  55. 0x0000, //PNCFG4 register,
  56. 0x0001, //PNCFG5 register,
  57. 0x0000, //TCODE register,
  58. 0x0000, //PN DC register,
  59. 0x0036, //PNCFG6 register,
  60. 0x0C24, //PNCFG7 register,
  61. 0xA521, //PNCFG8 register,
  62. 0xF045, //PNCFG9 register,
  63. 0x003F, //PNCFG10 register,
  64. 0x4442, //Misc_CFG1 register,
  65. 0x0729, //Misc_CFG2 register,
  66. 0x0040, //Misc_CFG3 register,
  67. 0x0021, //PLL7 register,
  68. 0xDA05, //PLL8 register,
  69. 0x0000, //PS MODE1 register,
  70. 0x0000, //PS MODE2 register,
  71. 0x0000, //PS MODE3 register,
  72. 0x0000, //TX3 register,
  73. 0x0060, //Misc_CFG4 register,
  74. 0x0000, //PNCFG11 register,
  75. 0x0000, //PNCFG12 register,
  76. 0x0000, //PNCFG13 register,
  77. 0x0000, //PNCFG14 register,
  78. 0x0000, //PNCFG15 register,
  79. 0x0000, //PNCFG16 register,
  80. 0x0000, //PNCFG17 register,
  81. 0x000F, //PNCFG18 register,
  82. 0x0000, //CSMA1 register,
  83. 0x0000, //CSMA2 register,
  84. 0x0000, //TXPA register,
  85. 0x0000, //DCMON1 register,
  86. 0x0000, //DCMON2 register,
  87. 0x0000, //DCMON3 register,
  88. 0x0000, //MBUS1 register,
  89. 0x0000, //MBUS2 register,
  90. 0x0000, //MBUS3 register,
  91. 0x0000, //MBUS4 register,
  92. 0x0000, //MBUS5 register,
  93. 0x0000, //PN DC2 register,
  94. 0x0000, //VCB2 register,
  95. 0x0000, //PS MODE4 register
  96. 0x0000 //WOR3 register
  97. };
  98. #endif