si446x_cmd.h 265 KB

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  1. /*
  2. * Silicon Laboratories Confidential
  3. * Copyright 2008-2014 Silicon Laboratories, Inc.
  4. *
  5. * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT!
  6. *
  7. * Generated from API Version:
  8. * Interface Version: 1.0
  9. * Document Version: 2.0.3
  10. *
  11. * Relevant to parts:
  12. * Si4460_revC2A, Si4461_revC2A, Si4463_revC2A
  13. *
  14. */
  15. #ifndef SI446X_CMD_H
  16. #define SI446X_CMD_H
  17. /* This section contains command map declarations */
  18. struct si446x_reply_GENERIC_map {
  19. uint8_t REPLY[16];
  20. };
  21. struct si446x_reply_PART_INFO_map {
  22. uint8_t CHIPREV;
  23. uint16_t PART;
  24. uint8_t PBUILD;
  25. uint16_t ID;
  26. uint8_t CUSTOMER;
  27. uint8_t ROMID;
  28. };
  29. struct si446x_reply_FUNC_INFO_map {
  30. uint8_t REVEXT;
  31. uint8_t REVBRANCH;
  32. uint8_t REVINT;
  33. uint8_t FUNC;
  34. };
  35. struct si446x_reply_GET_PROPERTY_map {
  36. uint8_t DATA[16];
  37. };
  38. struct si446x_reply_GPIO_PIN_CFG_map {
  39. uint8_t GPIO[4];
  40. uint8_t NIRQ;
  41. uint8_t SDO;
  42. uint8_t GEN_CONFIG;
  43. };
  44. struct si446x_reply_FIFO_INFO_map {
  45. uint8_t RX_FIFO_COUNT;
  46. uint8_t TX_FIFO_SPACE;
  47. };
  48. struct si446x_reply_GET_INT_STATUS_map {
  49. uint8_t INT_PEND;
  50. uint8_t INT_STATUS;
  51. uint8_t PH_PEND;
  52. uint8_t PH_STATUS;
  53. uint8_t MODEM_PEND;
  54. uint8_t MODEM_STATUS;
  55. uint8_t CHIP_PEND;
  56. uint8_t CHIP_STATUS;
  57. };
  58. struct si446x_reply_REQUEST_DEVICE_STATE_map {
  59. uint8_t CURR_STATE;
  60. uint8_t CURRENT_CHANNEL;
  61. };
  62. struct si446x_reply_READ_CMD_BUFF_map {
  63. uint8_t BYTE[16];
  64. };
  65. struct si446x_reply_FRR_A_READ_map {
  66. uint8_t FRR_A_VALUE;
  67. uint8_t FRR_B_VALUE;
  68. uint8_t FRR_C_VALUE;
  69. uint8_t FRR_D_VALUE;
  70. };
  71. struct si446x_reply_FRR_B_READ_map {
  72. uint8_t FRR_B_VALUE;
  73. uint8_t FRR_C_VALUE;
  74. uint8_t FRR_D_VALUE;
  75. uint8_t FRR_A_VALUE;
  76. };
  77. struct si446x_reply_FRR_C_READ_map {
  78. uint8_t FRR_C_VALUE;
  79. uint8_t FRR_D_VALUE;
  80. uint8_t FRR_A_VALUE;
  81. uint8_t FRR_B_VALUE;
  82. };
  83. struct si446x_reply_FRR_D_READ_map {
  84. uint8_t FRR_D_VALUE;
  85. uint8_t FRR_A_VALUE;
  86. uint8_t FRR_B_VALUE;
  87. uint8_t FRR_C_VALUE;
  88. };
  89. struct si446x_reply_IRCAL_MANUAL_map {
  90. uint8_t IRCAL_AMP_REPLY;
  91. uint8_t IRCAL_PH_REPLY;
  92. };
  93. struct si446x_reply_PACKET_INFO_map {
  94. uint16_t LENGTH;
  95. };
  96. struct si446x_reply_GET_MODEM_STATUS_map {
  97. uint8_t MODEM_PEND;
  98. uint8_t MODEM_STATUS;
  99. uint8_t CURR_RSSI;
  100. uint8_t LATCH_RSSI;
  101. uint8_t ANT1_RSSI;
  102. uint8_t ANT2_RSSI;
  103. uint16_t AFC_FREQ_OFFSET;
  104. };
  105. struct si446x_reply_READ_RX_FIFO_map {
  106. uint8_t DATA[2];
  107. };
  108. struct si446x_reply_GET_ADC_READING_map {
  109. uint16_t GPIO_ADC;
  110. uint16_t BATTERY_ADC;
  111. uint16_t TEMP_ADC;
  112. };
  113. struct si446x_reply_GET_PH_STATUS_map {
  114. uint8_t PH_PEND;
  115. uint8_t PH_STATUS;
  116. };
  117. struct si446x_reply_GET_CHIP_STATUS_map {
  118. uint8_t CHIP_PEND;
  119. uint8_t CHIP_STATUS;
  120. uint8_t CMD_ERR_STATUS;
  121. uint8_t CMD_ERR_CMD_ID;
  122. };
  123. /* The union that stores the reply written back to the host registers */
  124. union si446x_cmd_reply_union {
  125. uint8_t RAW[16];
  126. struct si446x_reply_GENERIC_map GENERIC;
  127. struct si446x_reply_PART_INFO_map PART_INFO;
  128. struct si446x_reply_FUNC_INFO_map FUNC_INFO;
  129. struct si446x_reply_GET_PROPERTY_map GET_PROPERTY;
  130. struct si446x_reply_GPIO_PIN_CFG_map GPIO_PIN_CFG;
  131. struct si446x_reply_FIFO_INFO_map FIFO_INFO;
  132. struct si446x_reply_GET_INT_STATUS_map GET_INT_STATUS;
  133. struct si446x_reply_REQUEST_DEVICE_STATE_map REQUEST_DEVICE_STATE;
  134. struct si446x_reply_READ_CMD_BUFF_map READ_CMD_BUFF;
  135. struct si446x_reply_FRR_A_READ_map FRR_A_READ;
  136. struct si446x_reply_FRR_B_READ_map FRR_B_READ;
  137. struct si446x_reply_FRR_C_READ_map FRR_C_READ;
  138. struct si446x_reply_FRR_D_READ_map FRR_D_READ;
  139. struct si446x_reply_IRCAL_MANUAL_map IRCAL_MANUAL;
  140. struct si446x_reply_PACKET_INFO_map PACKET_INFO;
  141. struct si446x_reply_GET_MODEM_STATUS_map GET_MODEM_STATUS;
  142. struct si446x_reply_READ_RX_FIFO_map READ_RX_FIFO;
  143. struct si446x_reply_GET_ADC_READING_map GET_ADC_READING;
  144. struct si446x_reply_GET_PH_STATUS_map GET_PH_STATUS;
  145. struct si446x_reply_GET_CHIP_STATUS_map GET_CHIP_STATUS;
  146. };
  147. /* boot commands */
  148. #define SI446X_CMD_ID_POWER_UP 0x02
  149. /* POWER_UP ARGS */
  150. #define SI446X_CMD_ARG_COUNT_POWER_UP 7
  151. /* macros for entire ARG BOOT_OPTIONS access of type uint8_t */
  152. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_TYPE uint8_t
  153. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_SIZE 8
  154. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_MASK 0xff
  155. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_MSB 7
  156. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_LSB 0
  157. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_INDEX 1
  158. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_value (((cmd.arg.POWER_UP.BOOT_OPTIONS)))
  159. /* macros for field PATCH access */
  160. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_TYPE enum
  161. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_SIZE 1
  162. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_MASK 0x80
  163. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_BIT 0x80
  164. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_MSB 7
  165. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_LSB 7
  166. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_INDEX 1
  167. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_is_true (cmd.arg.POWER_UP.BOOT_OPTIONS & 0x80)
  168. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_value (((cmd.arg.POWER_UP.BOOT_OPTIONS & 0x80)) >> 7)
  169. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_ENUM_NO_PATCH 0
  170. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_ENUM_PATCH 1
  171. /* macros for field FUNC access */
  172. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_TYPE enum
  173. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_SIZE 6
  174. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_MASK 0x3f
  175. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_MSB 5
  176. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_LSB 0
  177. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_INDEX 1
  178. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_value (((cmd.arg.POWER_UP.BOOT_OPTIONS & 0x3f)))
  179. #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_ENUM_PRO 1
  180. /* macros for entire ARG XTAL_OPTIONS access of type uint8_t */
  181. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TYPE uint8_t
  182. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_SIZE 8
  183. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_MASK 0xff
  184. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_MSB 7
  185. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_LSB 0
  186. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_INDEX 2
  187. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_value (((cmd.arg.POWER_UP.XTAL_OPTIONS)))
  188. /* macros for field TCXO access */
  189. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_TYPE enum
  190. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_SIZE 1
  191. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_MASK 0x1
  192. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_BIT 0x1
  193. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_MSB 0
  194. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_LSB 0
  195. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_INDEX 2
  196. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_is_true (cmd.arg.POWER_UP.XTAL_OPTIONS & 0x1)
  197. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_value (((cmd.arg.POWER_UP.XTAL_OPTIONS & 0x1)))
  198. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_ENUM_XTAL 0
  199. #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_ENUM_TCXO 1
  200. /* macros for entire ARG XO_FREQ access of type U32 */
  201. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_TYPE U32
  202. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_SIZE 32
  203. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_MASK 0xffffffff
  204. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_MSB 31
  205. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_LSB 0
  206. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_INDEX 3
  207. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_value (((cmd.arg.POWER_UP.XO_FREQ)))
  208. /* macros for field XO_FREQ access */
  209. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_TYPE U32
  210. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_SIZE 32
  211. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MASK 0xffffffff
  212. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MSB 31
  213. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_LSB 0
  214. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_INDEX 3
  215. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MIN 0x17d7840
  216. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MAX 0x1e84800
  217. #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_value (((cmd.arg.POWER_UP.XO_FREQ & 0xffffffff)))
  218. /* POWER_UP REPLY */
  219. #define SI446X_CMD_REPLY_COUNT_POWER_UP 0
  220. /* common commands */
  221. #define SI446X_CMD_ID_NOP 0x00
  222. /* NOP ARGS */
  223. #define SI446X_CMD_ARG_COUNT_NOP 1
  224. /* NOP REPLY */
  225. #define SI446X_CMD_REPLY_COUNT_NOP 0
  226. #define SI446X_CMD_ID_PART_INFO 0x01
  227. /* PART_INFO ARGS */
  228. #define SI446X_CMD_ARG_COUNT_PART_INFO 1
  229. /* PART_INFO REPLY */
  230. #define SI446X_CMD_REPLY_COUNT_PART_INFO 8
  231. /* macros for entire REPLY CHIPREV access of type uint8_t */
  232. #define SI446X_CMD_PART_INFO_REP_CHIPREV_TYPE uint8_t
  233. #define SI446X_CMD_PART_INFO_REP_CHIPREV_SIZE 8
  234. #define SI446X_CMD_PART_INFO_REP_CHIPREV_MASK 0xff
  235. #define SI446X_CMD_PART_INFO_REP_CHIPREV_MSB 7
  236. #define SI446X_CMD_PART_INFO_REP_CHIPREV_LSB 0
  237. #define SI446X_CMD_PART_INFO_REP_CHIPREV_INDEX 1
  238. /* macros for field CHIPREV access */
  239. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_TYPE uint8_t
  240. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_SIZE 8
  241. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_MASK 0xff
  242. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_MSB 7
  243. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_LSB 0
  244. #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_INDEX 1
  245. /* macros for entire REPLY PART access of type uint16_t */
  246. #define SI446X_CMD_PART_INFO_REP_PART_TYPE uint16_t
  247. #define SI446X_CMD_PART_INFO_REP_PART_SIZE 16
  248. #define SI446X_CMD_PART_INFO_REP_PART_MASK 0xffff
  249. #define SI446X_CMD_PART_INFO_REP_PART_MSB 15
  250. #define SI446X_CMD_PART_INFO_REP_PART_LSB 0
  251. #define SI446X_CMD_PART_INFO_REP_PART_INDEX 2
  252. /* macros for field PART access */
  253. #define SI446X_CMD_PART_INFO_REP_PART_PART_TYPE uint16_t
  254. #define SI446X_CMD_PART_INFO_REP_PART_PART_SIZE 16
  255. #define SI446X_CMD_PART_INFO_REP_PART_PART_MASK 0xffff
  256. #define SI446X_CMD_PART_INFO_REP_PART_PART_MSB 15
  257. #define SI446X_CMD_PART_INFO_REP_PART_PART_LSB 0
  258. #define SI446X_CMD_PART_INFO_REP_PART_PART_INDEX 2
  259. /* macros for entire REPLY PBUILD access of type uint8_t */
  260. #define SI446X_CMD_PART_INFO_REP_PBUILD_TYPE uint8_t
  261. #define SI446X_CMD_PART_INFO_REP_PBUILD_SIZE 8
  262. #define SI446X_CMD_PART_INFO_REP_PBUILD_MASK 0xff
  263. #define SI446X_CMD_PART_INFO_REP_PBUILD_MSB 7
  264. #define SI446X_CMD_PART_INFO_REP_PBUILD_LSB 0
  265. #define SI446X_CMD_PART_INFO_REP_PBUILD_INDEX 4
  266. /* macros for field PBUILD access */
  267. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_TYPE uint8_t
  268. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_SIZE 8
  269. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_MASK 0xff
  270. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_MSB 7
  271. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_LSB 0
  272. #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_INDEX 4
  273. /* macros for entire REPLY ID access of type uint16_t */
  274. #define SI446X_CMD_PART_INFO_REP_ID_TYPE uint16_t
  275. #define SI446X_CMD_PART_INFO_REP_ID_SIZE 16
  276. #define SI446X_CMD_PART_INFO_REP_ID_MASK 0xffff
  277. #define SI446X_CMD_PART_INFO_REP_ID_MSB 15
  278. #define SI446X_CMD_PART_INFO_REP_ID_LSB 0
  279. #define SI446X_CMD_PART_INFO_REP_ID_INDEX 5
  280. /* macros for field ID access */
  281. #define SI446X_CMD_PART_INFO_REP_ID_ID_TYPE uint16_t
  282. #define SI446X_CMD_PART_INFO_REP_ID_ID_SIZE 16
  283. #define SI446X_CMD_PART_INFO_REP_ID_ID_MASK 0xffff
  284. #define SI446X_CMD_PART_INFO_REP_ID_ID_MSB 15
  285. #define SI446X_CMD_PART_INFO_REP_ID_ID_LSB 0
  286. #define SI446X_CMD_PART_INFO_REP_ID_ID_INDEX 5
  287. /* macros for entire REPLY CUSTOMER access of type uint8_t */
  288. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_TYPE uint8_t
  289. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_SIZE 8
  290. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_MASK 0xff
  291. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_MSB 7
  292. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_LSB 0
  293. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_INDEX 7
  294. /* macros for field CUSTOMER access */
  295. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_TYPE uint8_t
  296. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_SIZE 8
  297. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_MASK 0xff
  298. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_MSB 7
  299. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_LSB 0
  300. #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_INDEX 7
  301. /* macros for entire REPLY ROMID access of type uint8_t */
  302. #define SI446X_CMD_PART_INFO_REP_ROMID_TYPE uint8_t
  303. #define SI446X_CMD_PART_INFO_REP_ROMID_SIZE 8
  304. #define SI446X_CMD_PART_INFO_REP_ROMID_MASK 0xff
  305. #define SI446X_CMD_PART_INFO_REP_ROMID_MSB 7
  306. #define SI446X_CMD_PART_INFO_REP_ROMID_LSB 0
  307. #define SI446X_CMD_PART_INFO_REP_ROMID_INDEX 8
  308. /* macros for field ROMID access */
  309. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_TYPE uint8_t
  310. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_SIZE 8
  311. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_MASK 0xff
  312. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_MSB 7
  313. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_LSB 0
  314. #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_INDEX 8
  315. #define SI446X_CMD_ID_FUNC_INFO 0x10
  316. /* FUNC_INFO ARGS */
  317. #define SI446X_CMD_ARG_COUNT_FUNC_INFO 1
  318. /* FUNC_INFO REPLY */
  319. #define SI446X_CMD_REPLY_COUNT_FUNC_INFO 6
  320. /* macros for entire REPLY REVEXT access of type uint8_t */
  321. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_TYPE uint8_t
  322. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_SIZE 8
  323. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_MASK 0xff
  324. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_MSB 7
  325. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_LSB 0
  326. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_INDEX 1
  327. /* macros for field REVEXT access */
  328. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_TYPE uint8_t
  329. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_SIZE 8
  330. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MASK 0xff
  331. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MSB 7
  332. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_LSB 0
  333. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_INDEX 1
  334. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MIN 0x0
  335. #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MAX 0xff
  336. /* macros for entire REPLY REVBRANCH access of type uint8_t */
  337. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_TYPE uint8_t
  338. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_SIZE 8
  339. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_MASK 0xff
  340. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_MSB 7
  341. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_LSB 0
  342. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_INDEX 2
  343. /* macros for field REVBRANCH access */
  344. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_TYPE uint8_t
  345. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_SIZE 8
  346. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MASK 0xff
  347. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MSB 7
  348. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_LSB 0
  349. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_INDEX 2
  350. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MIN 0x0
  351. #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MAX 0xff
  352. /* macros for entire REPLY REVINT access of type uint8_t */
  353. #define SI446X_CMD_FUNC_INFO_REP_REVINT_TYPE uint8_t
  354. #define SI446X_CMD_FUNC_INFO_REP_REVINT_SIZE 8
  355. #define SI446X_CMD_FUNC_INFO_REP_REVINT_MASK 0xff
  356. #define SI446X_CMD_FUNC_INFO_REP_REVINT_MSB 7
  357. #define SI446X_CMD_FUNC_INFO_REP_REVINT_LSB 0
  358. #define SI446X_CMD_FUNC_INFO_REP_REVINT_INDEX 3
  359. /* macros for field REVINT access */
  360. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_TYPE uint8_t
  361. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_SIZE 8
  362. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MASK 0xff
  363. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MSB 7
  364. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_LSB 0
  365. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_INDEX 3
  366. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MIN 0x0
  367. #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MAX 0xff
  368. /* macros for entire REPLY FUNC access of type uint8_t */
  369. #define SI446X_CMD_FUNC_INFO_REP_FUNC_TYPE uint8_t
  370. #define SI446X_CMD_FUNC_INFO_REP_FUNC_SIZE 8
  371. #define SI446X_CMD_FUNC_INFO_REP_FUNC_MASK 0xff
  372. #define SI446X_CMD_FUNC_INFO_REP_FUNC_MSB 7
  373. #define SI446X_CMD_FUNC_INFO_REP_FUNC_LSB 0
  374. #define SI446X_CMD_FUNC_INFO_REP_FUNC_INDEX 6
  375. /* macros for field FUNC access */
  376. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_TYPE uint8_t
  377. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_SIZE 8
  378. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_MASK 0xff
  379. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_MSB 7
  380. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_LSB 0
  381. #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_INDEX 6
  382. #define SI446X_CMD_ID_SET_PROPERTY 0x11
  383. /* SET_PROPERTY ARGS */
  384. #define SI446X_CMD_ARG_COUNT_SET_PROPERTY 16
  385. /* macros for entire ARG GROUP access of type uint8_t */
  386. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_TYPE uint8_t
  387. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_SIZE 8
  388. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_MASK 0xff
  389. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_MSB 7
  390. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_LSB 0
  391. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_INDEX 1
  392. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_value (((cmd.arg.SET_PROPERTY.GROUP)))
  393. /* macros for field GROUP access */
  394. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_TYPE uint8_t
  395. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_SIZE 8
  396. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_MASK 0xff
  397. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_MSB 7
  398. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_LSB 0
  399. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_INDEX 1
  400. #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_value (((cmd.arg.SET_PROPERTY.GROUP & 0xff)))
  401. /* macros for entire ARG NUM_PROPS access of type uint8_t */
  402. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_TYPE uint8_t
  403. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_SIZE 8
  404. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_MASK 0xff
  405. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_MSB 7
  406. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_LSB 0
  407. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_INDEX 2
  408. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_value (((cmd.arg.SET_PROPERTY.NUM_PROPS)))
  409. /* macros for field NUM_PROPS access */
  410. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_TYPE uint8_t
  411. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_SIZE 8
  412. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MASK 0xff
  413. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MSB 7
  414. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_LSB 0
  415. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_INDEX 2
  416. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MIN 0x1
  417. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MAX 0xc
  418. #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_value (((cmd.arg.SET_PROPERTY.NUM_PROPS & 0xff)))
  419. /* macros for entire ARG START_PROP access of type uint8_t */
  420. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_TYPE uint8_t
  421. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_SIZE 8
  422. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_MASK 0xff
  423. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_MSB 7
  424. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_LSB 0
  425. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_INDEX 3
  426. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_value (((cmd.arg.SET_PROPERTY.START_PROP)))
  427. /* macros for field START_PROP access */
  428. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_TYPE uint8_t
  429. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_SIZE 8
  430. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_MASK 0xff
  431. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_MSB 7
  432. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_LSB 0
  433. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_INDEX 3
  434. #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_value (((cmd.arg.SET_PROPERTY.START_PROP & 0xff)))
  435. /* macros for entire ARG DATA access of type uint8_t */
  436. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_TYPE uint8_t
  437. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_SIZE 8
  438. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_MASK 0xff
  439. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_MSB 7
  440. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_LSB 0
  441. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_INDEX 4
  442. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_ARRAY_LEN 12
  443. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_value(i) (((cmd.arg.SET_PROPERTY.DATA[(i)])))
  444. /* macros for field DATA access */
  445. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_TYPE uint8_t
  446. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_SIZE 8
  447. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_MASK 0xff
  448. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_MSB 7
  449. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_LSB 0
  450. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_INDEX 4
  451. #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_value(i) (((cmd.arg.SET_PROPERTY.DATA[(i)] & 0xff)))
  452. /* SET_PROPERTY REPLY */
  453. #define SI446X_CMD_REPLY_COUNT_SET_PROPERTY 0
  454. #define SI446X_CMD_ID_GET_PROPERTY 0x12
  455. /* GET_PROPERTY ARGS */
  456. #define SI446X_CMD_ARG_COUNT_GET_PROPERTY 4
  457. /* macros for entire ARG GROUP access of type uint8_t */
  458. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_TYPE uint8_t
  459. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_SIZE 8
  460. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_MASK 0xff
  461. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_MSB 7
  462. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_LSB 0
  463. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_INDEX 1
  464. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_value (((cmd.arg.GET_PROPERTY.GROUP)))
  465. /* macros for field GROUP access */
  466. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_TYPE uint8_t
  467. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_SIZE 8
  468. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_MASK 0xff
  469. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_MSB 7
  470. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_LSB 0
  471. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_INDEX 1
  472. #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_value (((cmd.arg.GET_PROPERTY.GROUP & 0xff)))
  473. /* macros for entire ARG NUM_PROPS access of type uint8_t */
  474. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_TYPE uint8_t
  475. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_SIZE 8
  476. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_MASK 0xff
  477. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_MSB 7
  478. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_LSB 0
  479. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_INDEX 2
  480. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_value (((cmd.arg.GET_PROPERTY.NUM_PROPS)))
  481. /* macros for field NUM_PROPS access */
  482. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_TYPE uint8_t
  483. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_SIZE 8
  484. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MASK 0xff
  485. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MSB 7
  486. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_LSB 0
  487. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_INDEX 2
  488. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MIN 0x1
  489. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MAX 0x10
  490. #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_value (((cmd.arg.GET_PROPERTY.NUM_PROPS & 0xff)))
  491. /* macros for entire ARG START_PROP access of type uint8_t */
  492. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_TYPE uint8_t
  493. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_SIZE 8
  494. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_MASK 0xff
  495. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_MSB 7
  496. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_LSB 0
  497. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_INDEX 3
  498. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_value (((cmd.arg.GET_PROPERTY.START_PROP)))
  499. /* macros for field START_PROP access */
  500. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_TYPE uint8_t
  501. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_SIZE 8
  502. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_MASK 0xff
  503. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_MSB 7
  504. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_LSB 0
  505. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_INDEX 3
  506. #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_value (((cmd.arg.GET_PROPERTY.START_PROP & 0xff)))
  507. /* GET_PROPERTY REPLY */
  508. #define SI446X_CMD_REPLY_COUNT_GET_PROPERTY 16
  509. /* macros for entire REPLY DATA access of type uint8_t */
  510. #define SI446X_CMD_GET_PROPERTY_REP_DATA_TYPE uint8_t
  511. #define SI446X_CMD_GET_PROPERTY_REP_DATA_SIZE 8
  512. #define SI446X_CMD_GET_PROPERTY_REP_DATA_MASK 0xff
  513. #define SI446X_CMD_GET_PROPERTY_REP_DATA_MSB 7
  514. #define SI446X_CMD_GET_PROPERTY_REP_DATA_LSB 0
  515. #define SI446X_CMD_GET_PROPERTY_REP_DATA_INDEX 1
  516. #define SI446X_CMD_GET_PROPERTY_REP_DATA_ARRAY_LEN 16
  517. /* macros for field DATA access */
  518. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_TYPE uint8_t
  519. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_SIZE 8
  520. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_MASK 0xff
  521. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_MSB 7
  522. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_LSB 0
  523. #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_INDEX 1
  524. #define SI446X_CMD_ID_GPIO_PIN_CFG 0x13
  525. /* GPIO_PIN_CFG ARGS */
  526. #define SI446X_CMD_ARG_COUNT_GPIO_PIN_CFG 8
  527. /* macros for entire ARG GPIO access of type uint8_t */
  528. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_TYPE uint8_t
  529. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_SIZE 8
  530. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_MASK 0xff
  531. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_MSB 7
  532. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_LSB 0
  533. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_INDEX 1
  534. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_ARRAY_LEN 4
  535. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)])))
  536. /* macros for field PULL_CTL access */
  537. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_TYPE enum
  538. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_SIZE 1
  539. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_MASK 0x40
  540. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_BIT 0x40
  541. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_MSB 6
  542. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_LSB 6
  543. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_INDEX 1
  544. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_is_true(i) (cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x40)
  545. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x40)) >> 6)
  546. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_ENUM_PULL_DIS 0
  547. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_ENUM_PULL_EN 1
  548. /* macros for field GPIO_MODE access */
  549. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_TYPE enum
  550. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_SIZE 6
  551. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_MASK 0x3f
  552. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_MSB 5
  553. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_LSB 0
  554. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_INDEX 1
  555. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x3f)))
  556. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DONOTHING 0
  557. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TRISTATE 1
  558. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DRIVE0 2
  559. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DRIVE1 3
  560. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INPUT 4
  561. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_32K_CLK 5
  562. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_BOOT_CLK 6
  563. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DIV_CLK 7
  564. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CTS 8
  565. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INV_CTS 9
  566. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CMD_OVERLAP 10
  567. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_SDO 11
  568. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_POR 12
  569. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CAL_WUT 13
  570. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_WUT 14
  571. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_EN_PA 15
  572. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_DATA_CLK 16
  573. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_DATA_CLK 17
  574. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_EN_LNA 18
  575. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_DATA 19
  576. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_DATA 20
  577. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_RAW_DATA 21
  578. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_ANTENNA_1_SW 22
  579. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_ANTENNA_2_SW 23
  580. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_VALID_PREAMBLE 24
  581. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INVALID_PREAMBLE 25
  582. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_SYNC_WORD_DETECT 26
  583. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CCA 27
  584. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_IN_SLEEP 28
  585. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_RX_DATA_CLK 31
  586. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_STATE 32
  587. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_STATE 33
  588. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_FIFO_FULL 34
  589. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_FIFO_EMPTY 35
  590. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_LOW_BATT 36
  591. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CCA_LATCH 37
  592. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_HOPPED 38
  593. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_HOP_TABLE_WRAP 39
  594. /* macros for entire ARG NIRQ access of type uint8_t */
  595. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_TYPE uint8_t
  596. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_SIZE 8
  597. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_MASK 0xff
  598. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_MSB 7
  599. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_LSB 0
  600. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_INDEX 5
  601. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_value (((cmd.arg.GPIO_PIN_CFG.NIRQ)))
  602. /* macros for field PULL_CTL access */
  603. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_TYPE enum
  604. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_SIZE 1
  605. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_MASK 0x40
  606. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_BIT 0x40
  607. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_MSB 6
  608. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_LSB 6
  609. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_INDEX 5
  610. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_is_true (cmd.arg.GPIO_PIN_CFG.NIRQ & 0x40)
  611. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_value (((cmd.arg.GPIO_PIN_CFG.NIRQ & 0x40)) >> 6)
  612. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_ENUM_PULL_DIS 0
  613. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_ENUM_PULL_EN 1
  614. /* macros for field NIRQ_MODE access */
  615. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_TYPE enum
  616. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_SIZE 6
  617. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_MASK 0x3f
  618. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_MSB 5
  619. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_LSB 0
  620. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_INDEX 5
  621. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_value (((cmd.arg.GPIO_PIN_CFG.NIRQ & 0x3f)))
  622. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DONOTHING 0
  623. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TRISTATE 1
  624. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DRIVE0 2
  625. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DRIVE1 3
  626. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_INPUT 4
  627. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DIV_CLK 7
  628. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_CTS 8
  629. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_SDO 11
  630. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_POR 12
  631. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_EN_PA 15
  632. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_DATA_CLK 16
  633. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_DATA_CLK 17
  634. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_EN_LNA 18
  635. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_DATA 19
  636. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_DATA 20
  637. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_RAW_DATA 21
  638. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_ANTENNA_1_SW 22
  639. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_ANTENNA_2_SW 23
  640. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_VALID_PREAMBLE 24
  641. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_INVALID_PREAMBLE 25
  642. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_SYNC_WORD_DETECT 26
  643. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_CCA 27
  644. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_RX_DATA_CLK 31
  645. #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_NIRQ 39
  646. /* macros for entire ARG SDO access of type uint8_t */
  647. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_TYPE uint8_t
  648. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SIZE 8
  649. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_MASK 0xff
  650. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_MSB 7
  651. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_LSB 0
  652. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_INDEX 6
  653. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_value (((cmd.arg.GPIO_PIN_CFG.SDO)))
  654. /* macros for field PULL_CTL access */
  655. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_TYPE enum
  656. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_SIZE 1
  657. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_MASK 0x40
  658. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_BIT 0x40
  659. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_MSB 6
  660. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_LSB 6
  661. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_INDEX 6
  662. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_is_true (cmd.arg.GPIO_PIN_CFG.SDO & 0x40)
  663. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_value (((cmd.arg.GPIO_PIN_CFG.SDO & 0x40)) >> 6)
  664. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_ENUM_PULL_DIS 0
  665. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_ENUM_PULL_EN 1
  666. /* macros for field SDO_MODE access */
  667. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_TYPE enum
  668. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_SIZE 6
  669. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_MASK 0x3f
  670. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_MSB 5
  671. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_LSB 0
  672. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_INDEX 6
  673. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_value (((cmd.arg.GPIO_PIN_CFG.SDO & 0x3f)))
  674. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DONOTHING 0
  675. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TRISTATE 1
  676. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DRIVE0 2
  677. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DRIVE1 3
  678. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_INPUT 4
  679. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_32K_CLK 5
  680. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DIV_CLK 7
  681. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_CTS 8
  682. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_SDO 11
  683. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_POR 12
  684. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_WUT 14
  685. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_EN_PA 15
  686. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TX_DATA_CLK 16
  687. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_DATA_CLK 17
  688. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_EN_LNA 18
  689. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TX_DATA 19
  690. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_DATA 20
  691. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_RAW_DATA 21
  692. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_ANTENNA_1_SW 22
  693. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_ANTENNA_2_SW 23
  694. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_VALID_PREAMBLE 24
  695. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_INVALID_PREAMBLE 25
  696. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_SYNC_WORD_DETECT 26
  697. #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_CCA 27
  698. /* macros for entire ARG GEN_CONFIG access of type uint8_t */
  699. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_TYPE uint8_t
  700. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_SIZE 8
  701. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_MASK 0xff
  702. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_MSB 7
  703. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_LSB 0
  704. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_INDEX 7
  705. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_value (((cmd.arg.GPIO_PIN_CFG.GEN_CONFIG)))
  706. /* macros for field DRV_STRENGTH access */
  707. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_TYPE enum
  708. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_SIZE 2
  709. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_MASK 0x60
  710. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_MSB 6
  711. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_LSB 5
  712. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_INDEX 7
  713. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_value (((cmd.arg.GPIO_PIN_CFG.GEN_CONFIG & 0x60)) >> 5)
  714. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_HIGH 0
  715. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_HIGH 1
  716. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_LOW 2
  717. #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_LOW 3
  718. /* GPIO_PIN_CFG REPLY */
  719. #define SI446X_CMD_REPLY_COUNT_GPIO_PIN_CFG 7
  720. /* macros for entire REPLY GPIO access of type uint8_t */
  721. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_TYPE uint8_t
  722. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_SIZE 8
  723. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_MASK 0xff
  724. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_MSB 7
  725. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_LSB 0
  726. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_INDEX 1
  727. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_ARRAY_LEN 4
  728. /* macros for field GPIO_STATE access */
  729. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_TYPE enum
  730. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_SIZE 1
  731. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_MASK 0x80
  732. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_BIT 0x80
  733. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_MSB 7
  734. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_LSB 7
  735. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_INDEX 1
  736. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_ENUM_INACTIVE 0
  737. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_ENUM_ACTIVE 1
  738. /* macros for field GPIO_MODE access */
  739. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_TYPE enum
  740. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_SIZE 6
  741. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_MASK 0x3f
  742. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_MSB 5
  743. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_LSB 0
  744. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_INDEX 1
  745. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DONOTHING 0
  746. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TRISTATE 1
  747. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DRIVE0 2
  748. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DRIVE1 3
  749. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INPUT 4
  750. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_32K_CLK 5
  751. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_BOOT_CLK 6
  752. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DIV_CLK 7
  753. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CTS 8
  754. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INV_CTS 9
  755. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CMD_OVERLAP 10
  756. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_SDO 11
  757. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_POR 12
  758. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CAL_WUT 13
  759. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_WUT 14
  760. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_EN_PA 15
  761. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_DATA_CLK 16
  762. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_DATA_CLK 17
  763. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_EN_LNA 18
  764. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_DATA 19
  765. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_DATA 20
  766. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_RAW_DATA 21
  767. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_ANTENNA_1_SW 22
  768. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_ANTENNA_2_SW 23
  769. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_VALID_PREAMBLE 24
  770. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INVALID_PREAMBLE 25
  771. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_SYNC_WORD_DETECT 26
  772. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CCA 27
  773. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_IN_SLEEP 28
  774. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_RX_DATA_CLK 31
  775. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_STATE 32
  776. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_STATE 33
  777. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_FIFO_FULL 34
  778. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_FIFO_EMPTY 35
  779. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_LOW_BATT 36
  780. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CCA_LATCH 37
  781. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_HOPPED 38
  782. #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_HOP_TABLE_WRAP 39
  783. /* macros for entire REPLY NIRQ access of type uint8_t */
  784. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_TYPE uint8_t
  785. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_SIZE 8
  786. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_MASK 0xff
  787. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_MSB 7
  788. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_LSB 0
  789. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_INDEX 5
  790. /* macros for field NIRQ_STATE access */
  791. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_TYPE enum
  792. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_SIZE 1
  793. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_MASK 0x80
  794. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_BIT 0x80
  795. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_MSB 7
  796. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_LSB 7
  797. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_INDEX 5
  798. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_ENUM_INACTIVE 0
  799. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_ENUM_ACTIVE 1
  800. /* macros for field NIRQ_MODE access */
  801. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_TYPE enum
  802. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_SIZE 6
  803. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_MASK 0x3f
  804. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_MSB 5
  805. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_LSB 0
  806. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_INDEX 5
  807. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DONOTHING 0
  808. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TRISTATE 1
  809. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DRIVE0 2
  810. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DRIVE1 3
  811. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_INPUT 4
  812. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DIV_CLK 7
  813. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_CTS 8
  814. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_SDO 11
  815. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_POR 12
  816. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_EN_PA 15
  817. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_DATA_CLK 16
  818. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_DATA_CLK 17
  819. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_EN_LNA 18
  820. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_DATA 19
  821. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_DATA 20
  822. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_RAW_DATA 21
  823. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_ANTENNA_1_SW 22
  824. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_ANTENNA_2_SW 23
  825. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_VALID_PREAMBLE 24
  826. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_INVALID_PREAMBLE 25
  827. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_SYNC_WORD_DETECT 26
  828. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_CCA 27
  829. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_RX_DATA_CLK 31
  830. #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_NIRQ 39
  831. /* macros for entire REPLY SDO access of type uint8_t */
  832. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_TYPE uint8_t
  833. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SIZE 8
  834. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_MASK 0xff
  835. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_MSB 7
  836. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_LSB 0
  837. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_INDEX 6
  838. /* macros for field SDO_STATE access */
  839. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_TYPE enum
  840. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_SIZE 1
  841. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_MASK 0x80
  842. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_BIT 0x80
  843. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_MSB 7
  844. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_LSB 7
  845. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_INDEX 6
  846. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_ENUM_INACTIVE 0
  847. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_ENUM_ACTIVE 1
  848. /* macros for field SDO_MODE access */
  849. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_TYPE enum
  850. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_SIZE 6
  851. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_MASK 0x3f
  852. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_MSB 5
  853. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_LSB 0
  854. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_INDEX 6
  855. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DONOTHING 0
  856. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TRISTATE 1
  857. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DRIVE0 2
  858. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DRIVE1 3
  859. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_INPUT 4
  860. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_32K_CLK 5
  861. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DIV_CLK 7
  862. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_CTS 8
  863. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_SDO 11
  864. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_POR 12
  865. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_WUT 14
  866. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_EN_PA 15
  867. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TX_DATA_CLK 16
  868. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_DATA_CLK 17
  869. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_EN_LNA 18
  870. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TX_DATA 19
  871. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_DATA 20
  872. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_RAW_DATA 21
  873. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_ANTENNA_1_SW 22
  874. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_ANTENNA_2_SW 23
  875. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_VALID_PREAMBLE 24
  876. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_INVALID_PREAMBLE 25
  877. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_SYNC_WORD_DETECT 26
  878. #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_CCA 27
  879. /* macros for entire REPLY GEN_CONFIG access of type uint8_t */
  880. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_TYPE uint8_t
  881. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_SIZE 8
  882. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_MASK 0xff
  883. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_MSB 7
  884. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_LSB 0
  885. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_INDEX 7
  886. /* macros for field DRV_STRENGTH access */
  887. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_TYPE enum
  888. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_SIZE 2
  889. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_MASK 0x60
  890. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_MSB 6
  891. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_LSB 5
  892. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_INDEX 7
  893. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_HIGH 0
  894. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_HIGH 1
  895. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_LOW 2
  896. #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_LOW 3
  897. #define SI446X_CMD_ID_FIFO_INFO 0x15
  898. /* FIFO_INFO ARGS */
  899. #define SI446X_CMD_ARG_COUNT_FIFO_INFO 2
  900. /* macros for entire ARG FIFO access of type uint8_t */
  901. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TYPE uint8_t
  902. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_SIZE 8
  903. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_MASK 0xff
  904. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_MSB 7
  905. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_LSB 0
  906. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_INDEX 1
  907. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_value (((cmd.arg.FIFO_INFO.FIFO)))
  908. /* macros for field RX access */
  909. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_TYPE enum
  910. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_SIZE 1
  911. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_MASK 0x2
  912. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_BIT 0x2
  913. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_MSB 1
  914. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_LSB 1
  915. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_INDEX 1
  916. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_is_true (cmd.arg.FIFO_INFO.FIFO & 0x2)
  917. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_value (((cmd.arg.FIFO_INFO.FIFO & 0x2)) >> 1)
  918. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_ENUM_FALSE 0
  919. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_ENUM_TRUE 1
  920. /* macros for field TX access */
  921. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_TYPE enum
  922. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_SIZE 1
  923. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_MASK 0x1
  924. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_BIT 0x1
  925. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_MSB 0
  926. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_LSB 0
  927. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_INDEX 1
  928. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_is_true (cmd.arg.FIFO_INFO.FIFO & 0x1)
  929. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_value (((cmd.arg.FIFO_INFO.FIFO & 0x1)))
  930. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_ENUM_FALSE 0
  931. #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_ENUM_TRUE 1
  932. /* FIFO_INFO REPLY */
  933. #define SI446X_CMD_REPLY_COUNT_FIFO_INFO 2
  934. /* macros for entire REPLY RX_FIFO_COUNT access of type uint8_t */
  935. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_TYPE uint8_t
  936. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_SIZE 8
  937. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_MASK 0xff
  938. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_MSB 7
  939. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_LSB 0
  940. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_INDEX 1
  941. /* macros for field RX_FIFO_COUNT access */
  942. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_TYPE uint8_t
  943. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_SIZE 8
  944. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_MASK 0xff
  945. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_MSB 7
  946. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_LSB 0
  947. #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_INDEX 1
  948. /* macros for entire REPLY TX_FIFO_SPACE access of type uint8_t */
  949. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TYPE uint8_t
  950. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_SIZE 8
  951. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_MASK 0xff
  952. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_MSB 7
  953. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_LSB 0
  954. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_INDEX 2
  955. /* macros for field TX_FIFO_SPACE access */
  956. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_TYPE uint8_t
  957. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_SIZE 8
  958. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_MASK 0xff
  959. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_MSB 7
  960. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_LSB 0
  961. #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_INDEX 2
  962. #define SI446X_CMD_ID_GET_INT_STATUS 0x20
  963. /* GET_INT_STATUS ARGS */
  964. #define SI446X_CMD_ARG_COUNT_GET_INT_STATUS 4
  965. /* macros for entire ARG PH_CLR_PEND access of type uint8_t */
  966. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TYPE uint8_t
  967. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_SIZE 8
  968. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_MASK 0xff
  969. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_MSB 7
  970. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_LSB 0
  971. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_INDEX 1
  972. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND)))
  973. /* macros for field FILTER_MATCH_PEND_CLR access */
  974. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_TYPE bool
  975. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_SIZE 1
  976. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MASK 0x80
  977. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_BIT 0x80
  978. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MSB 7
  979. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_LSB 7
  980. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_INDEX 1
  981. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x80)
  982. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x80)) >> 7)
  983. /* macros for field FILTER_MISS_PEND_CLR access */
  984. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_TYPE bool
  985. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_SIZE 1
  986. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MASK 0x40
  987. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_BIT 0x40
  988. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MSB 6
  989. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_LSB 6
  990. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_INDEX 1
  991. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x40)
  992. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x40)) >> 6)
  993. /* macros for field PACKET_SENT_PEND_CLR access */
  994. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_TYPE bool
  995. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_SIZE 1
  996. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MASK 0x20
  997. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_BIT 0x20
  998. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MSB 5
  999. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_LSB 5
  1000. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_INDEX 1
  1001. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x20)
  1002. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x20)) >> 5)
  1003. /* macros for field PACKET_RX_PEND_CLR access */
  1004. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_TYPE bool
  1005. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_SIZE 1
  1006. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MASK 0x10
  1007. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_BIT 0x10
  1008. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MSB 4
  1009. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_LSB 4
  1010. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_INDEX 1
  1011. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x10)
  1012. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x10)) >> 4)
  1013. /* macros for field CRC_ERROR_PEND_CLR access */
  1014. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_TYPE bool
  1015. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_SIZE 1
  1016. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MASK 0x8
  1017. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_BIT 0x8
  1018. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MSB 3
  1019. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_LSB 3
  1020. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_INDEX 1
  1021. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x8)
  1022. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x8)) >> 3)
  1023. /* macros for field ALT_CRC_ERROR_PEND_CLR access */
  1024. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_TYPE bool
  1025. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_SIZE 1
  1026. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MASK 0x4
  1027. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_BIT 0x4
  1028. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MSB 2
  1029. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_LSB 2
  1030. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_INDEX 1
  1031. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x4)
  1032. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x4)) >> 2)
  1033. /* macros for field TX_FIFO_ALMOST_EMPTY_PEND_CLR access */
  1034. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_TYPE bool
  1035. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_SIZE 1
  1036. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MASK 0x2
  1037. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_BIT 0x2
  1038. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MSB 1
  1039. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_LSB 1
  1040. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_INDEX 1
  1041. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x2)
  1042. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x2)) >> 1)
  1043. /* macros for field RX_FIFO_ALMOST_FULL_PEND_CLR access */
  1044. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_TYPE bool
  1045. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_SIZE 1
  1046. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MASK 0x1
  1047. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_BIT 0x1
  1048. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MSB 0
  1049. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_LSB 0
  1050. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_INDEX 1
  1051. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x1)
  1052. #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x1)))
  1053. /* macros for entire ARG MODEM_CLR_PEND access of type uint8_t */
  1054. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_TYPE uint8_t
  1055. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SIZE 8
  1056. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_MASK 0xff
  1057. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_MSB 7
  1058. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_LSB 0
  1059. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INDEX 2
  1060. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND)))
  1061. /* macros for field RSSI_LATCH_PEND_CLR access */
  1062. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_TYPE bool
  1063. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_SIZE 1
  1064. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MASK 0x80
  1065. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_BIT 0x80
  1066. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MSB 7
  1067. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_LSB 7
  1068. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_INDEX 2
  1069. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x80)
  1070. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x80)) >> 7)
  1071. /* macros for field POSTAMBLE_DETECT_PEND_CLR access */
  1072. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_TYPE bool
  1073. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_SIZE 1
  1074. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MASK 0x40
  1075. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_BIT 0x40
  1076. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MSB 6
  1077. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_LSB 6
  1078. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_INDEX 2
  1079. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x40)
  1080. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x40)) >> 6)
  1081. /* macros for field INVALID_SYNC_PEND_CLR access */
  1082. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_TYPE bool
  1083. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_SIZE 1
  1084. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MASK 0x20
  1085. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_BIT 0x20
  1086. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MSB 5
  1087. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_LSB 5
  1088. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_INDEX 2
  1089. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x20)
  1090. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x20)) >> 5)
  1091. /* macros for field RSSI_JUMP_PEND_CLR access */
  1092. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_TYPE bool
  1093. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_SIZE 1
  1094. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MASK 0x10
  1095. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_BIT 0x10
  1096. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MSB 4
  1097. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_LSB 4
  1098. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_INDEX 2
  1099. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x10)
  1100. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x10)) >> 4)
  1101. /* macros for field RSSI_PEND_CLR access */
  1102. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_TYPE bool
  1103. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_SIZE 1
  1104. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MASK 0x8
  1105. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_BIT 0x8
  1106. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MSB 3
  1107. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_LSB 3
  1108. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_INDEX 2
  1109. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x8)
  1110. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x8)) >> 3)
  1111. /* macros for field INVALID_PREAMBLE_PEND_CLR access */
  1112. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_TYPE bool
  1113. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_SIZE 1
  1114. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MASK 0x4
  1115. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_BIT 0x4
  1116. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MSB 2
  1117. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_LSB 2
  1118. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_INDEX 2
  1119. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x4)
  1120. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x4)) >> 2)
  1121. /* macros for field PREAMBLE_DETECT_PEND_CLR access */
  1122. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_TYPE bool
  1123. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_SIZE 1
  1124. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MASK 0x2
  1125. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_BIT 0x2
  1126. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MSB 1
  1127. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_LSB 1
  1128. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_INDEX 2
  1129. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x2)
  1130. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x2)) >> 1)
  1131. /* macros for field SYNC_DETECT_PEND_CLR access */
  1132. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_TYPE bool
  1133. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_SIZE 1
  1134. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MASK 0x1
  1135. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_BIT 0x1
  1136. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MSB 0
  1137. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_LSB 0
  1138. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_INDEX 2
  1139. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x1)
  1140. #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x1)))
  1141. /* macros for entire ARG CHIP_CLR_PEND access of type uint8_t */
  1142. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_TYPE uint8_t
  1143. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_SIZE 8
  1144. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_MASK 0xff
  1145. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_MSB 7
  1146. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LSB 0
  1147. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_INDEX 3
  1148. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND)))
  1149. /* macros for field CAL_PEND_CLR access */
  1150. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_TYPE bool
  1151. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_SIZE 1
  1152. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MASK 0x40
  1153. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_BIT 0x40
  1154. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MSB 6
  1155. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_LSB 6
  1156. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_INDEX 3
  1157. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x40)
  1158. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x40)) >> 6)
  1159. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR access */
  1160. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_TYPE bool
  1161. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_SIZE 1
  1162. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MASK 0x20
  1163. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_BIT 0x20
  1164. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MSB 5
  1165. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_LSB 5
  1166. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_INDEX 3
  1167. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x20)
  1168. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x20)) >> 5)
  1169. /* macros for field STATE_CHANGE_PEND_CLR access */
  1170. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_TYPE bool
  1171. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_SIZE 1
  1172. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MASK 0x10
  1173. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_BIT 0x10
  1174. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MSB 4
  1175. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_LSB 4
  1176. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_INDEX 3
  1177. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x10)
  1178. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x10)) >> 4)
  1179. /* macros for field CMD_ERROR_PEND_CLR access */
  1180. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_TYPE bool
  1181. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_SIZE 1
  1182. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MASK 0x8
  1183. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_BIT 0x8
  1184. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MSB 3
  1185. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_LSB 3
  1186. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_INDEX 3
  1187. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x8)
  1188. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x8)) >> 3)
  1189. /* macros for field CHIP_READY_PEND_CLR access */
  1190. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_TYPE bool
  1191. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_SIZE 1
  1192. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MASK 0x4
  1193. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_BIT 0x4
  1194. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MSB 2
  1195. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_LSB 2
  1196. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_INDEX 3
  1197. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x4)
  1198. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x4)) >> 2)
  1199. /* macros for field LOW_BATT_PEND_CLR access */
  1200. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_TYPE bool
  1201. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_SIZE 1
  1202. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MASK 0x2
  1203. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_BIT 0x2
  1204. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MSB 1
  1205. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_LSB 1
  1206. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_INDEX 3
  1207. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x2)
  1208. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x2)) >> 1)
  1209. /* macros for field WUT_PEND_CLR access */
  1210. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_TYPE bool
  1211. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_SIZE 1
  1212. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MASK 0x1
  1213. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_BIT 0x1
  1214. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MSB 0
  1215. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_LSB 0
  1216. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_INDEX 3
  1217. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x1)
  1218. #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x1)))
  1219. /* GET_INT_STATUS REPLY */
  1220. #define SI446X_CMD_REPLY_COUNT_GET_INT_STATUS 8
  1221. /* macros for entire REPLY INT_PEND access of type uint8_t */
  1222. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_TYPE uint8_t
  1223. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_SIZE 8
  1224. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MASK 0xff
  1225. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MSB 7
  1226. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_LSB 0
  1227. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_INDEX 1
  1228. /* macros for field CHIP_INT_PEND access */
  1229. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_TYPE bool
  1230. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_SIZE 1
  1231. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_MASK 0x4
  1232. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_BIT 0x4
  1233. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_MSB 2
  1234. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_LSB 2
  1235. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_INDEX 1
  1236. /* macros for field MODEM_INT_PEND access */
  1237. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_TYPE bool
  1238. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_SIZE 1
  1239. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_MASK 0x2
  1240. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_BIT 0x2
  1241. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_MSB 1
  1242. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_LSB 1
  1243. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_INDEX 1
  1244. /* macros for field PH_INT_PEND access */
  1245. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_TYPE bool
  1246. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_SIZE 1
  1247. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_MASK 0x1
  1248. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_BIT 0x1
  1249. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_MSB 0
  1250. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_LSB 0
  1251. #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_INDEX 1
  1252. /* macros for entire REPLY INT_STATUS access of type uint8_t */
  1253. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_TYPE uint8_t
  1254. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_SIZE 8
  1255. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MASK 0xff
  1256. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MSB 7
  1257. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_LSB 0
  1258. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_INDEX 2
  1259. /* macros for field CHIP_INT_STATUS access */
  1260. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_TYPE bool
  1261. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_SIZE 1
  1262. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_MASK 0x4
  1263. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_BIT 0x4
  1264. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_MSB 2
  1265. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_LSB 2
  1266. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_INDEX 2
  1267. /* macros for field MODEM_INT_STATUS access */
  1268. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_TYPE bool
  1269. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_SIZE 1
  1270. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_MASK 0x2
  1271. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_BIT 0x2
  1272. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_MSB 1
  1273. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_LSB 1
  1274. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_INDEX 2
  1275. /* macros for field PH_INT_STATUS access */
  1276. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_TYPE bool
  1277. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_SIZE 1
  1278. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_MASK 0x1
  1279. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_BIT 0x1
  1280. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_MSB 0
  1281. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_LSB 0
  1282. #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_INDEX 2
  1283. /* macros for entire REPLY PH_PEND access of type uint8_t */
  1284. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TYPE uint8_t
  1285. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_SIZE 8
  1286. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_MASK 0xff
  1287. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_MSB 7
  1288. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_LSB 0
  1289. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_INDEX 3
  1290. /* macros for field FILTER_MATCH_PEND access */
  1291. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_TYPE bool
  1292. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_SIZE 1
  1293. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MASK 0x80
  1294. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_BIT 0x80
  1295. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MSB 7
  1296. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_LSB 7
  1297. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_INDEX 3
  1298. /* macros for field FILTER_MISS_PEND access */
  1299. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_TYPE bool
  1300. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_SIZE 1
  1301. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MASK 0x40
  1302. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_BIT 0x40
  1303. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MSB 6
  1304. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_LSB 6
  1305. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_INDEX 3
  1306. /* macros for field PACKET_SENT_PEND access */
  1307. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_TYPE bool
  1308. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_SIZE 1
  1309. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MASK 0x20
  1310. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_BIT 0x20
  1311. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MSB 5
  1312. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_LSB 5
  1313. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_INDEX 3
  1314. /* macros for field PACKET_RX_PEND access */
  1315. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_TYPE bool
  1316. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_SIZE 1
  1317. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_MASK 0x10
  1318. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_BIT 0x10
  1319. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_MSB 4
  1320. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_LSB 4
  1321. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_INDEX 3
  1322. /* macros for field CRC_ERROR_PEND access */
  1323. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_TYPE bool
  1324. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_SIZE 1
  1325. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MASK 0x8
  1326. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_BIT 0x8
  1327. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MSB 3
  1328. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_LSB 3
  1329. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_INDEX 3
  1330. /* macros for field ALT_CRC_ERROR_PEND access */
  1331. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_TYPE bool
  1332. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_SIZE 1
  1333. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MASK 0x4
  1334. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_BIT 0x4
  1335. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MSB 2
  1336. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_LSB 2
  1337. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_INDEX 3
  1338. /* macros for field TX_FIFO_ALMOST_EMPTY_PEND access */
  1339. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_TYPE bool
  1340. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_SIZE 1
  1341. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MASK 0x2
  1342. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_BIT 0x2
  1343. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MSB 1
  1344. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_LSB 1
  1345. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_INDEX 3
  1346. /* macros for field RX_FIFO_ALMOST_FULL_PEND access */
  1347. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_TYPE bool
  1348. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_SIZE 1
  1349. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MASK 0x1
  1350. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_BIT 0x1
  1351. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MSB 0
  1352. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_LSB 0
  1353. #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_INDEX 3
  1354. /* macros for entire REPLY PH_STATUS access of type uint8_t */
  1355. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TYPE uint8_t
  1356. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_SIZE 8
  1357. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_MASK 0xff
  1358. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_MSB 7
  1359. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_LSB 0
  1360. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_INDEX 4
  1361. /* macros for field FILTER_MATCH access */
  1362. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_TYPE bool
  1363. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_SIZE 1
  1364. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_MASK 0x80
  1365. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_BIT 0x80
  1366. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_MSB 7
  1367. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_LSB 7
  1368. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_INDEX 4
  1369. /* macros for field FILTER_MISS access */
  1370. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_TYPE bool
  1371. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_SIZE 1
  1372. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_MASK 0x40
  1373. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_BIT 0x40
  1374. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_MSB 6
  1375. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_LSB 6
  1376. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_INDEX 4
  1377. /* macros for field PACKET_SENT access */
  1378. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_TYPE bool
  1379. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_SIZE 1
  1380. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_MASK 0x20
  1381. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_BIT 0x20
  1382. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_MSB 5
  1383. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_LSB 5
  1384. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_INDEX 4
  1385. /* macros for field PACKET_RX access */
  1386. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_TYPE bool
  1387. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_SIZE 1
  1388. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_MASK 0x10
  1389. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_BIT 0x10
  1390. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_MSB 4
  1391. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_LSB 4
  1392. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_INDEX 4
  1393. /* macros for field CRC_ERROR access */
  1394. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_TYPE bool
  1395. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_SIZE 1
  1396. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_MASK 0x8
  1397. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_BIT 0x8
  1398. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_MSB 3
  1399. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_LSB 3
  1400. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_INDEX 4
  1401. /* macros for field ALT_CRC_ERROR access */
  1402. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_TYPE bool
  1403. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_SIZE 1
  1404. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MASK 0x4
  1405. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_BIT 0x4
  1406. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MSB 2
  1407. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_LSB 2
  1408. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_INDEX 4
  1409. /* macros for field TX_FIFO_ALMOST_EMPTY access */
  1410. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_TYPE bool
  1411. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_SIZE 1
  1412. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MASK 0x2
  1413. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_BIT 0x2
  1414. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MSB 1
  1415. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_LSB 1
  1416. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_INDEX 4
  1417. /* macros for field RX_FIFO_ALMOST_FULL access */
  1418. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_TYPE bool
  1419. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_SIZE 1
  1420. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MASK 0x1
  1421. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_BIT 0x1
  1422. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MSB 0
  1423. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_LSB 0
  1424. #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_INDEX 4
  1425. /* macros for entire REPLY MODEM_PEND access of type uint8_t */
  1426. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_TYPE uint8_t
  1427. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SIZE 8
  1428. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_MASK 0xff
  1429. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_MSB 7
  1430. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_LSB 0
  1431. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INDEX 5
  1432. /* macros for field RSSI_LATCH_PEND access */
  1433. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_TYPE bool
  1434. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_SIZE 1
  1435. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MASK 0x80
  1436. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_BIT 0x80
  1437. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MSB 7
  1438. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_LSB 7
  1439. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_INDEX 5
  1440. /* macros for field POSTAMBLE_DETECT_PEND access */
  1441. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_TYPE bool
  1442. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_SIZE 1
  1443. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MASK 0x40
  1444. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_BIT 0x40
  1445. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MSB 6
  1446. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_LSB 6
  1447. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_INDEX 5
  1448. /* macros for field INVALID_SYNC_PEND access */
  1449. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_TYPE bool
  1450. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_SIZE 1
  1451. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MASK 0x20
  1452. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_BIT 0x20
  1453. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MSB 5
  1454. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_LSB 5
  1455. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_INDEX 5
  1456. /* macros for field RSSI_JUMP_PEND access */
  1457. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_TYPE bool
  1458. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_SIZE 1
  1459. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MASK 0x10
  1460. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_BIT 0x10
  1461. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MSB 4
  1462. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_LSB 4
  1463. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_INDEX 5
  1464. /* macros for field RSSI_PEND access */
  1465. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_TYPE bool
  1466. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_SIZE 1
  1467. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_MASK 0x8
  1468. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_BIT 0x8
  1469. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_MSB 3
  1470. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_LSB 3
  1471. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_INDEX 5
  1472. /* macros for field INVALID_PREAMBLE_PEND access */
  1473. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_TYPE bool
  1474. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_SIZE 1
  1475. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MASK 0x4
  1476. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_BIT 0x4
  1477. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MSB 2
  1478. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_LSB 2
  1479. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_INDEX 5
  1480. /* macros for field PREAMBLE_DETECT_PEND access */
  1481. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_TYPE bool
  1482. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_SIZE 1
  1483. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MASK 0x2
  1484. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_BIT 0x2
  1485. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MSB 1
  1486. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_LSB 1
  1487. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_INDEX 5
  1488. /* macros for field SYNC_DETECT_PEND access */
  1489. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_TYPE bool
  1490. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_SIZE 1
  1491. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MASK 0x1
  1492. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_BIT 0x1
  1493. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MSB 0
  1494. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_LSB 0
  1495. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_INDEX 5
  1496. /* macros for entire REPLY MODEM_STATUS access of type uint8_t */
  1497. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_TYPE uint8_t
  1498. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SIZE 8
  1499. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_MASK 0xff
  1500. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_MSB 7
  1501. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_LSB 0
  1502. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INDEX 6
  1503. /* macros for field RSSI_LATCH access */
  1504. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_TYPE bool
  1505. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_SIZE 1
  1506. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MASK 0x80
  1507. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_BIT 0x80
  1508. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MSB 7
  1509. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_LSB 7
  1510. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_INDEX 6
  1511. /* macros for field POSTAMBLE_DETECT access */
  1512. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_TYPE bool
  1513. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_SIZE 1
  1514. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MASK 0x40
  1515. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_BIT 0x40
  1516. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MSB 6
  1517. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_LSB 6
  1518. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_INDEX 6
  1519. /* macros for field INVALID_SYNC access */
  1520. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_TYPE bool
  1521. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_SIZE 1
  1522. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MASK 0x20
  1523. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_BIT 0x20
  1524. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MSB 5
  1525. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_LSB 5
  1526. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_INDEX 6
  1527. /* macros for field RSSI_JUMP access */
  1528. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_TYPE bool
  1529. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_SIZE 1
  1530. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MASK 0x10
  1531. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_BIT 0x10
  1532. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MSB 4
  1533. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_LSB 4
  1534. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_INDEX 6
  1535. /* macros for field RSSI access */
  1536. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_TYPE bool
  1537. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_SIZE 1
  1538. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_MASK 0x8
  1539. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_BIT 0x8
  1540. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_MSB 3
  1541. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LSB 3
  1542. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_INDEX 6
  1543. /* macros for field INVALID_PREAMBLE access */
  1544. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_TYPE bool
  1545. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_SIZE 1
  1546. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MASK 0x4
  1547. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_BIT 0x4
  1548. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MSB 2
  1549. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_LSB 2
  1550. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_INDEX 6
  1551. /* macros for field PREAMBLE_DETECT access */
  1552. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_TYPE bool
  1553. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_SIZE 1
  1554. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MASK 0x2
  1555. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_BIT 0x2
  1556. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MSB 1
  1557. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_LSB 1
  1558. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_INDEX 6
  1559. /* macros for field SYNC_DETECT access */
  1560. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_TYPE bool
  1561. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_SIZE 1
  1562. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MASK 0x1
  1563. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_BIT 0x1
  1564. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MSB 0
  1565. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_LSB 0
  1566. #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_INDEX 6
  1567. /* macros for entire REPLY CHIP_PEND access of type uint8_t */
  1568. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_TYPE uint8_t
  1569. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_SIZE 8
  1570. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_MASK 0xff
  1571. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_MSB 7
  1572. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LSB 0
  1573. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_INDEX 7
  1574. /* macros for field CAL_PEND access */
  1575. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_TYPE bool
  1576. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_SIZE 1
  1577. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_MASK 0x40
  1578. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_BIT 0x40
  1579. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_MSB 6
  1580. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_LSB 6
  1581. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_INDEX 7
  1582. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND access */
  1583. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_TYPE bool
  1584. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_SIZE 1
  1585. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MASK 0x20
  1586. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_BIT 0x20
  1587. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MSB 5
  1588. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_LSB 5
  1589. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_INDEX 7
  1590. /* macros for field STATE_CHANGE_PEND access */
  1591. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_TYPE bool
  1592. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_SIZE 1
  1593. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MASK 0x10
  1594. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_BIT 0x10
  1595. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MSB 4
  1596. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_LSB 4
  1597. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_INDEX 7
  1598. /* macros for field CMD_ERROR_PEND access */
  1599. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_TYPE bool
  1600. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_SIZE 1
  1601. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MASK 0x8
  1602. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_BIT 0x8
  1603. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MSB 3
  1604. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_LSB 3
  1605. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_INDEX 7
  1606. /* macros for field CHIP_READY_PEND access */
  1607. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_TYPE bool
  1608. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_SIZE 1
  1609. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MASK 0x4
  1610. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_BIT 0x4
  1611. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MSB 2
  1612. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_LSB 2
  1613. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_INDEX 7
  1614. /* macros for field LOW_BATT_PEND access */
  1615. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_TYPE bool
  1616. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_SIZE 1
  1617. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MASK 0x2
  1618. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_BIT 0x2
  1619. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MSB 1
  1620. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_LSB 1
  1621. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_INDEX 7
  1622. /* macros for field WUT_PEND access */
  1623. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_TYPE bool
  1624. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_SIZE 1
  1625. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_MASK 0x1
  1626. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_BIT 0x1
  1627. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_MSB 0
  1628. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_LSB 0
  1629. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_INDEX 7
  1630. /* macros for entire REPLY CHIP_STATUS access of type uint8_t */
  1631. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_TYPE uint8_t
  1632. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_SIZE 8
  1633. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_MASK 0xff
  1634. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_MSB 7
  1635. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LSB 0
  1636. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_INDEX 8
  1637. /* macros for field CAL access */
  1638. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_TYPE bool
  1639. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_SIZE 1
  1640. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_MASK 0x40
  1641. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_BIT 0x40
  1642. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_MSB 6
  1643. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_LSB 6
  1644. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_INDEX 8
  1645. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR access */
  1646. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_TYPE bool
  1647. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_SIZE 1
  1648. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MASK 0x20
  1649. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_BIT 0x20
  1650. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MSB 5
  1651. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_LSB 5
  1652. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_INDEX 8
  1653. /* macros for field STATE_CHANGE access */
  1654. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_TYPE bool
  1655. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_SIZE 1
  1656. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MASK 0x10
  1657. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_BIT 0x10
  1658. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MSB 4
  1659. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_LSB 4
  1660. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_INDEX 8
  1661. /* macros for field CMD_ERROR access */
  1662. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_TYPE bool
  1663. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_SIZE 1
  1664. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_MASK 0x8
  1665. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_BIT 0x8
  1666. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_MSB 3
  1667. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_LSB 3
  1668. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_INDEX 8
  1669. /* macros for field CHIP_READY access */
  1670. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_TYPE bool
  1671. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_SIZE 1
  1672. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_MASK 0x4
  1673. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_BIT 0x4
  1674. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_MSB 2
  1675. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_LSB 2
  1676. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_INDEX 8
  1677. /* macros for field LOW_BATT access */
  1678. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_TYPE bool
  1679. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_SIZE 1
  1680. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_MASK 0x2
  1681. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_BIT 0x2
  1682. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_MSB 1
  1683. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_LSB 1
  1684. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_INDEX 8
  1685. /* macros for field WUT access */
  1686. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_TYPE bool
  1687. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_SIZE 1
  1688. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_MASK 0x1
  1689. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_BIT 0x1
  1690. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_MSB 0
  1691. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_LSB 0
  1692. #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_INDEX 8
  1693. #define SI446X_CMD_ID_REQUEST_DEVICE_STATE 0x33
  1694. /* REQUEST_DEVICE_STATE ARGS */
  1695. #define SI446X_CMD_ARG_COUNT_REQUEST_DEVICE_STATE 1
  1696. /* REQUEST_DEVICE_STATE REPLY */
  1697. #define SI446X_CMD_REPLY_COUNT_REQUEST_DEVICE_STATE 2
  1698. /* macros for entire REPLY CURR_STATE access of type uint8_t */
  1699. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_TYPE uint8_t
  1700. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_SIZE 8
  1701. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MASK 0xff
  1702. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MSB 7
  1703. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_LSB 0
  1704. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_INDEX 1
  1705. /* macros for field MAIN_STATE access */
  1706. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_TYPE enum
  1707. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_SIZE 4
  1708. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_MASK 0xf
  1709. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_MSB 3
  1710. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_LSB 0
  1711. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_INDEX 1
  1712. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_SLEEP 1
  1713. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_SPI_ACTIVE 2
  1714. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_READY 3
  1715. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_READY2 4
  1716. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_TX_TUNE 5
  1717. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_RX_TUNE 6
  1718. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_TX 7
  1719. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_RX 8
  1720. /* macros for entire REPLY CURRENT_CHANNEL access of type uint8_t */
  1721. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_TYPE uint8_t
  1722. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_SIZE 8
  1723. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_MASK 0xff
  1724. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_MSB 7
  1725. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_LSB 0
  1726. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_INDEX 2
  1727. /* macros for field CURRENT_CHANNEL access */
  1728. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_TYPE uint8_t
  1729. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_SIZE 8
  1730. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_MASK 0xff
  1731. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_MSB 7
  1732. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_LSB 0
  1733. #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_INDEX 2
  1734. #define SI446X_CMD_ID_CHANGE_STATE 0x34
  1735. /* CHANGE_STATE ARGS */
  1736. #define SI446X_CMD_ARG_COUNT_CHANGE_STATE 2
  1737. /* macros for entire ARG NEXT_STATE1 access of type uint8_t */
  1738. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_TYPE uint8_t
  1739. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_SIZE 8
  1740. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_MASK 0xff
  1741. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_MSB 7
  1742. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_LSB 0
  1743. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_INDEX 1
  1744. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_value (((cmd.arg.CHANGE_STATE.NEXT_STATE1)))
  1745. /* macros for field NEW_STATE access */
  1746. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_TYPE enum
  1747. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_SIZE 4
  1748. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_MASK 0xf
  1749. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_MSB 3
  1750. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_LSB 0
  1751. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_INDEX 1
  1752. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_value (((cmd.arg.CHANGE_STATE.NEXT_STATE1 & 0xf)))
  1753. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_NOCHANGE 0
  1754. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_SLEEP 1
  1755. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_SPI_ACTIVE 2
  1756. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_READY 3
  1757. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_TX_TUNE 5
  1758. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_RX_TUNE 6
  1759. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_TX 7
  1760. #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_RX 8
  1761. /* CHANGE_STATE REPLY */
  1762. #define SI446X_CMD_REPLY_COUNT_CHANGE_STATE 0
  1763. #define SI446X_CMD_ID_READ_CMD_BUFF 0x44
  1764. /* READ_CMD_BUFF ARGS */
  1765. #define SI446X_CMD_ARG_COUNT_READ_CMD_BUFF 1
  1766. /* READ_CMD_BUFF REPLY */
  1767. #define SI446X_CMD_REPLY_COUNT_READ_CMD_BUFF 16
  1768. /* macros for entire REPLY BYTE access of type uint8_t */
  1769. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_TYPE uint8_t
  1770. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_SIZE 8
  1771. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_MASK 0xff
  1772. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_MSB 7
  1773. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_LSB 0
  1774. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_INDEX 1
  1775. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_ARRAY_LEN 16
  1776. /* macros for field CMD_BUFF access */
  1777. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_TYPE uint8_t
  1778. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_SIZE 8
  1779. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_MASK 0xff
  1780. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_MSB 7
  1781. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_LSB 0
  1782. #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_INDEX 1
  1783. #define SI446X_CMD_ID_FRR_A_READ 0x50
  1784. /* FRR_A_READ ARGS */
  1785. #define SI446X_CMD_ARG_COUNT_FRR_A_READ 1
  1786. /* FRR_A_READ REPLY */
  1787. #define SI446X_CMD_REPLY_COUNT_FRR_A_READ 4
  1788. /* macros for entire REPLY FRR_A_VALUE access of type uint8_t */
  1789. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_TYPE uint8_t
  1790. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_SIZE 8
  1791. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_MASK 0xff
  1792. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_MSB 7
  1793. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_LSB 0
  1794. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_INDEX 0
  1795. /* macros for field FRR_A_VALUE access */
  1796. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE uint8_t
  1797. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8
  1798. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff
  1799. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7
  1800. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0
  1801. #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 0
  1802. /* macros for entire REPLY FRR_B_VALUE access of type uint8_t */
  1803. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_TYPE uint8_t
  1804. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_SIZE 8
  1805. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_MASK 0xff
  1806. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_MSB 7
  1807. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_LSB 0
  1808. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_INDEX 1
  1809. /* macros for field FRR_B_VALUE access */
  1810. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE uint8_t
  1811. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8
  1812. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff
  1813. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7
  1814. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0
  1815. #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 1
  1816. /* macros for entire REPLY FRR_C_VALUE access of type uint8_t */
  1817. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_TYPE uint8_t
  1818. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_SIZE 8
  1819. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_MASK 0xff
  1820. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_MSB 7
  1821. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_LSB 0
  1822. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_INDEX 2
  1823. /* macros for field FRR_C_VALUE access */
  1824. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE uint8_t
  1825. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8
  1826. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff
  1827. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7
  1828. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0
  1829. #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 2
  1830. /* macros for entire REPLY FRR_D_VALUE access of type uint8_t */
  1831. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_TYPE uint8_t
  1832. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_SIZE 8
  1833. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_MASK 0xff
  1834. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_MSB 7
  1835. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_LSB 0
  1836. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_INDEX 3
  1837. /* macros for field FRR_D_VALUE access */
  1838. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE uint8_t
  1839. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8
  1840. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff
  1841. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7
  1842. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0
  1843. #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 3
  1844. #define SI446X_CMD_ID_FRR_B_READ 0x51
  1845. /* FRR_B_READ ARGS */
  1846. #define SI446X_CMD_ARG_COUNT_FRR_B_READ 1
  1847. /* FRR_B_READ REPLY */
  1848. #define SI446X_CMD_REPLY_COUNT_FRR_B_READ 4
  1849. /* macros for entire REPLY FRR_B_VALUE access of type uint8_t */
  1850. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_TYPE uint8_t
  1851. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_SIZE 8
  1852. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_MASK 0xff
  1853. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_MSB 7
  1854. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_LSB 0
  1855. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_INDEX 0
  1856. /* macros for field FRR_B_VALUE access */
  1857. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE uint8_t
  1858. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8
  1859. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff
  1860. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7
  1861. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0
  1862. #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 0
  1863. /* macros for entire REPLY FRR_C_VALUE access of type uint8_t */
  1864. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_TYPE uint8_t
  1865. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_SIZE 8
  1866. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_MASK 0xff
  1867. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_MSB 7
  1868. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_LSB 0
  1869. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_INDEX 1
  1870. /* macros for field FRR_C_VALUE access */
  1871. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE uint8_t
  1872. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8
  1873. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff
  1874. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7
  1875. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0
  1876. #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 1
  1877. /* macros for entire REPLY FRR_D_VALUE access of type uint8_t */
  1878. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_TYPE uint8_t
  1879. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_SIZE 8
  1880. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_MASK 0xff
  1881. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_MSB 7
  1882. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_LSB 0
  1883. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_INDEX 2
  1884. /* macros for field FRR_D_VALUE access */
  1885. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE uint8_t
  1886. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8
  1887. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff
  1888. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7
  1889. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0
  1890. #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 2
  1891. /* macros for entire REPLY FRR_A_VALUE access of type uint8_t */
  1892. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_TYPE uint8_t
  1893. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_SIZE 8
  1894. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_MASK 0xff
  1895. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_MSB 7
  1896. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_LSB 0
  1897. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_INDEX 3
  1898. /* macros for field FRR_A_VALUE access */
  1899. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE uint8_t
  1900. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8
  1901. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff
  1902. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7
  1903. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0
  1904. #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 3
  1905. #define SI446X_CMD_ID_FRR_C_READ 0x53
  1906. /* FRR_C_READ ARGS */
  1907. #define SI446X_CMD_ARG_COUNT_FRR_C_READ 1
  1908. /* FRR_C_READ REPLY */
  1909. #define SI446X_CMD_REPLY_COUNT_FRR_C_READ 4
  1910. /* macros for entire REPLY FRR_C_VALUE access of type uint8_t */
  1911. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_TYPE uint8_t
  1912. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_SIZE 8
  1913. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_MASK 0xff
  1914. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_MSB 7
  1915. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_LSB 0
  1916. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_INDEX 0
  1917. /* macros for field FRR_C_VALUE access */
  1918. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE uint8_t
  1919. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8
  1920. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff
  1921. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7
  1922. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0
  1923. #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 0
  1924. /* macros for entire REPLY FRR_D_VALUE access of type uint8_t */
  1925. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_TYPE uint8_t
  1926. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_SIZE 8
  1927. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_MASK 0xff
  1928. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_MSB 7
  1929. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_LSB 0
  1930. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_INDEX 1
  1931. /* macros for field FRR_D_VALUE access */
  1932. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE uint8_t
  1933. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8
  1934. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff
  1935. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7
  1936. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0
  1937. #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 1
  1938. /* macros for entire REPLY FRR_A_VALUE access of type uint8_t */
  1939. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_TYPE uint8_t
  1940. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_SIZE 8
  1941. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_MASK 0xff
  1942. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_MSB 7
  1943. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_LSB 0
  1944. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_INDEX 2
  1945. /* macros for field FRR_A_VALUE access */
  1946. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE uint8_t
  1947. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8
  1948. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff
  1949. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7
  1950. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0
  1951. #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 2
  1952. /* macros for entire REPLY FRR_B_VALUE access of type uint8_t */
  1953. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_TYPE uint8_t
  1954. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_SIZE 8
  1955. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_MASK 0xff
  1956. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_MSB 7
  1957. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_LSB 0
  1958. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_INDEX 3
  1959. /* macros for field FRR_B_VALUE access */
  1960. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE uint8_t
  1961. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8
  1962. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff
  1963. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7
  1964. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0
  1965. #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 3
  1966. #define SI446X_CMD_ID_FRR_D_READ 0x57
  1967. /* FRR_D_READ ARGS */
  1968. #define SI446X_CMD_ARG_COUNT_FRR_D_READ 1
  1969. /* FRR_D_READ REPLY */
  1970. #define SI446X_CMD_REPLY_COUNT_FRR_D_READ 4
  1971. /* macros for entire REPLY FRR_D_VALUE access of type uint8_t */
  1972. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_TYPE uint8_t
  1973. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_SIZE 8
  1974. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_MASK 0xff
  1975. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_MSB 7
  1976. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_LSB 0
  1977. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_INDEX 0
  1978. /* macros for field FRR_D_VALUE access */
  1979. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE uint8_t
  1980. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8
  1981. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff
  1982. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7
  1983. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0
  1984. #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 0
  1985. /* macros for entire REPLY FRR_A_VALUE access of type uint8_t */
  1986. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_TYPE uint8_t
  1987. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_SIZE 8
  1988. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_MASK 0xff
  1989. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_MSB 7
  1990. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_LSB 0
  1991. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_INDEX 1
  1992. /* macros for field FRR_A_VALUE access */
  1993. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE uint8_t
  1994. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8
  1995. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff
  1996. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7
  1997. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0
  1998. #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 1
  1999. /* macros for entire REPLY FRR_B_VALUE access of type uint8_t */
  2000. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_TYPE uint8_t
  2001. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_SIZE 8
  2002. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_MASK 0xff
  2003. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_MSB 7
  2004. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_LSB 0
  2005. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_INDEX 2
  2006. /* macros for field FRR_B_VALUE access */
  2007. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE uint8_t
  2008. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8
  2009. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff
  2010. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7
  2011. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0
  2012. #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 2
  2013. /* macros for entire REPLY FRR_C_VALUE access of type uint8_t */
  2014. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_TYPE uint8_t
  2015. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_SIZE 8
  2016. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_MASK 0xff
  2017. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_MSB 7
  2018. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_LSB 0
  2019. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_INDEX 3
  2020. /* macros for field FRR_C_VALUE access */
  2021. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE uint8_t
  2022. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8
  2023. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff
  2024. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7
  2025. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0
  2026. #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 3
  2027. /* ir_cal commands */
  2028. #define SI446X_CMD_ID_IRCAL 0x17
  2029. /* IRCAL ARGS */
  2030. #define SI446X_CMD_ARG_COUNT_IRCAL 5
  2031. /* macros for entire ARG SEARCHING_STEP_SIZE access of type uint8_t */
  2032. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_TYPE uint8_t
  2033. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_SIZE 8
  2034. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_MASK 0xff
  2035. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_MSB 7
  2036. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_LSB 0
  2037. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INDEX 1
  2038. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE)))
  2039. /* macros for field INITIAL_PH_AMP access */
  2040. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_TYPE enum
  2041. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_SIZE 1
  2042. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_MASK 0x40
  2043. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_BIT 0x40
  2044. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_MSB 6
  2045. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_LSB 6
  2046. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_INDEX 1
  2047. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_is_true (cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x40)
  2048. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x40)) >> 6)
  2049. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_ENUM_ENUM_0 1
  2050. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_ENUM_ENUM_1 0
  2051. /* macros for field FINE_STEP_SIZE access */
  2052. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_TYPE uint8_t
  2053. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_SIZE 2
  2054. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_MASK 0x30
  2055. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_MSB 5
  2056. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_LSB 4
  2057. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_INDEX 1
  2058. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x30)) >> 4)
  2059. /* macros for field COARSE_STEP_SIZE access */
  2060. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_TYPE uint8_t
  2061. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_SIZE 4
  2062. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_MASK 0xf
  2063. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_MSB 3
  2064. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_LSB 0
  2065. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_INDEX 1
  2066. #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0xf)))
  2067. /* macros for entire ARG SEARCHING_RSSI_AVG access of type uint8_t */
  2068. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_TYPE uint8_t
  2069. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SIZE 8
  2070. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_MASK 0xff
  2071. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_MSB 7
  2072. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_LSB 0
  2073. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_INDEX 2
  2074. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG)))
  2075. /* macros for field STEP_BY_STEP access */
  2076. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_TYPE enum
  2077. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_SIZE 1
  2078. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_MASK 0x80
  2079. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_BIT 0x80
  2080. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_MSB 7
  2081. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_LSB 7
  2082. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_INDEX 2
  2083. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x80)
  2084. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x80)) >> 7)
  2085. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_ENUM_ENUM_0 0
  2086. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_ENUM_ENUM_1 1
  2087. /* macros for field SKIP_INIT_SEARCH_STAT access */
  2088. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_TYPE enum
  2089. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_SIZE 1
  2090. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_MASK 0x40
  2091. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_BIT 0x40
  2092. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_MSB 6
  2093. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_LSB 6
  2094. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_INDEX 2
  2095. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x40)
  2096. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x40)) >> 6)
  2097. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_ENUM_ENUM_0 0
  2098. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_ENUM_ENUM_1 1
  2099. /* macros for field RSSI_FINE_AVG access */
  2100. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_TYPE enum
  2101. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_SIZE 2
  2102. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_MASK 0x30
  2103. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_MSB 5
  2104. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_LSB 4
  2105. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_INDEX 2
  2106. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x30)) >> 4)
  2107. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_0 0
  2108. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_1 1
  2109. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_2 2
  2110. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_3 3
  2111. /* macros for field SKIP_CAL access */
  2112. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_TYPE enum
  2113. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_SIZE 1
  2114. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_MASK 0x4
  2115. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_BIT 0x4
  2116. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_MSB 2
  2117. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_LSB 2
  2118. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_INDEX 2
  2119. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x4)
  2120. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x4)) >> 2)
  2121. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_ENUM_ENUM_0 0
  2122. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_ENUM_ENUM_1 1
  2123. /* macros for field RSSI_COARSE_AVG access */
  2124. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_TYPE enum
  2125. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_SIZE 2
  2126. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_MASK 0x3
  2127. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_MSB 1
  2128. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_LSB 0
  2129. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_INDEX 2
  2130. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x3)))
  2131. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_0 0
  2132. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_1 1
  2133. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_2 2
  2134. #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_3 3
  2135. /* macros for entire ARG RX_CHAIN_SETTING1 access of type uint8_t */
  2136. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_TYPE uint8_t
  2137. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_SIZE 8
  2138. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_MASK 0xff
  2139. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_MSB 7
  2140. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_LSB 0
  2141. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_INDEX 3
  2142. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1)))
  2143. /* macros for field EN_HRMNIC_GEN access */
  2144. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_TYPE enum
  2145. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_SIZE 1
  2146. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_MASK 0x80
  2147. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_BIT 0x80
  2148. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_MSB 7
  2149. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_LSB 7
  2150. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_INDEX 3
  2151. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x80)
  2152. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x80)) >> 7)
  2153. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_ENUM_ENUM_0 0
  2154. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_ENUM_ENUM_1 1
  2155. /* macros for field IRCLKDIV access */
  2156. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_TYPE enum
  2157. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_SIZE 1
  2158. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_MASK 0x40
  2159. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_BIT 0x40
  2160. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_MSB 6
  2161. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_LSB 6
  2162. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_INDEX 3
  2163. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x40)
  2164. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x40)) >> 6)
  2165. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_ENUM_ENUM_0 0
  2166. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_ENUM_ENUM_1 1
  2167. /* macros for field RF_SOURCE_PWR access */
  2168. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_TYPE enum
  2169. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_SIZE 2
  2170. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_MASK 0x30
  2171. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_MSB 5
  2172. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_LSB 4
  2173. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_INDEX 3
  2174. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x30)) >> 4)
  2175. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_0 0
  2176. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_1 1
  2177. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_2 2
  2178. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_3 3
  2179. /* macros for field CLOSE_SHUNT_SWITCH access */
  2180. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_TYPE enum
  2181. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_SIZE 1
  2182. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_MASK 0x8
  2183. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_BIT 0x8
  2184. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_MSB 3
  2185. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_LSB 3
  2186. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_INDEX 3
  2187. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x8)
  2188. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x8)) >> 3)
  2189. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_ENUM_ENUM_0 0
  2190. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_ENUM_ENUM_1 1
  2191. /* macros for field PGA_GAIN access */
  2192. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_TYPE enum
  2193. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_SIZE 3
  2194. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_MASK 0x7
  2195. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_MSB 2
  2196. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_LSB 0
  2197. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_INDEX 3
  2198. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x7)))
  2199. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_0 0
  2200. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_1 1
  2201. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_2 2
  2202. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_3 3
  2203. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_4 4
  2204. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_5 5
  2205. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_6 6
  2206. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_7 7
  2207. /* macros for entire ARG RX_CHAIN_SETTING2 access of type uint8_t */
  2208. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_TYPE uint8_t
  2209. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_SIZE 8
  2210. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_MASK 0xff
  2211. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_MSB 7
  2212. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_LSB 0
  2213. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_INDEX 4
  2214. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2)))
  2215. /* macros for field RSSI_READ_DELAY access */
  2216. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_TYPE enum
  2217. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_SIZE 4
  2218. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_MASK 0xf0
  2219. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_MSB 7
  2220. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_LSB 4
  2221. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_INDEX 4
  2222. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0xf0)) >> 4)
  2223. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_0 0
  2224. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_1 1
  2225. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_2 15
  2226. /* macros for field ADC_HIGH_GAIN access */
  2227. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_TYPE enum
  2228. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_SIZE 1
  2229. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_MASK 0x1
  2230. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_BIT 0x1
  2231. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_MSB 0
  2232. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_LSB 0
  2233. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_INDEX 4
  2234. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0x1)
  2235. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0x1)))
  2236. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_ENUM_ENUM_0 0
  2237. #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_ENUM_ENUM_1 1
  2238. /* IRCAL REPLY */
  2239. #define SI446X_CMD_REPLY_COUNT_IRCAL 0
  2240. #define SI446X_CMD_ID_IRCAL_MANUAL 0x1a
  2241. /* IRCAL_MANUAL ARGS */
  2242. #define SI446X_CMD_ARG_COUNT_IRCAL_MANUAL 3
  2243. /* macros for entire ARG IRCAL_AMP access of type uint8_t */
  2244. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_TYPE uint8_t
  2245. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_SIZE 8
  2246. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_MASK 0xff
  2247. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_MSB 7
  2248. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_LSB 0
  2249. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_INDEX 1
  2250. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP)))
  2251. /* macros for field IRCAL_AMP_SKIP access */
  2252. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_TYPE enum
  2253. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_SIZE 1
  2254. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_MASK 0x80
  2255. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_BIT 0x80
  2256. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_MSB 7
  2257. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_LSB 7
  2258. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_INDEX 1
  2259. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x80)
  2260. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x80)) >> 7)
  2261. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_ENUM_APPLY 0
  2262. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_ENUM_SKIP 1
  2263. /* macros for field IRCAL_AMP_SIGN access */
  2264. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_TYPE enum
  2265. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_SIZE 1
  2266. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_MASK 0x20
  2267. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_BIT 0x20
  2268. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_MSB 5
  2269. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_LSB 5
  2270. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_INDEX 1
  2271. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x20)
  2272. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x20)) >> 5)
  2273. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_ENUM_POS 0
  2274. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_ENUM_NEG 1
  2275. /* macros for field IRCAL_AMP_MAG access */
  2276. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_TYPE uint8_t
  2277. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_SIZE 5
  2278. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_MASK 0x1f
  2279. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_MSB 4
  2280. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_LSB 0
  2281. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_INDEX 1
  2282. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x1f)))
  2283. /* macros for entire ARG IRCAL_PH access of type uint8_t */
  2284. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_TYPE uint8_t
  2285. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_SIZE 8
  2286. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_MASK 0xff
  2287. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_MSB 7
  2288. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_LSB 0
  2289. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_INDEX 2
  2290. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH)))
  2291. /* macros for field IRCAL_PH_SKIP access */
  2292. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_TYPE enum
  2293. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_SIZE 1
  2294. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_MASK 0x80
  2295. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_BIT 0x80
  2296. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_MSB 7
  2297. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_LSB 7
  2298. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_INDEX 2
  2299. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x80)
  2300. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x80)) >> 7)
  2301. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_ENUM_APPLY 0
  2302. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_ENUM_SKIP 1
  2303. /* macros for field IRCAL_PH_SIGN access */
  2304. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_TYPE enum
  2305. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_SIZE 1
  2306. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_MASK 0x20
  2307. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_BIT 0x20
  2308. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_MSB 5
  2309. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_LSB 5
  2310. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_INDEX 2
  2311. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x20)
  2312. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x20)) >> 5)
  2313. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_ENUM_POS 0
  2314. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_ENUM_NEG 1
  2315. /* macros for field IRCAL_PH_MAG access */
  2316. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_TYPE uint8_t
  2317. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_SIZE 5
  2318. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_MASK 0x1f
  2319. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_MSB 4
  2320. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_LSB 0
  2321. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_INDEX 2
  2322. #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x1f)))
  2323. /* IRCAL_MANUAL REPLY */
  2324. #define SI446X_CMD_REPLY_COUNT_IRCAL_MANUAL 2
  2325. /* macros for entire REPLY IRCAL_AMP_REPLY access of type uint8_t */
  2326. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_TYPE uint8_t
  2327. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_SIZE 8
  2328. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_MASK 0xff
  2329. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_MSB 7
  2330. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_LSB 0
  2331. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_INDEX 1
  2332. /* macros for field IRCAL_AMP_SIGN access */
  2333. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_TYPE enum
  2334. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_SIZE 1
  2335. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_MASK 0x20
  2336. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_BIT 0x20
  2337. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_MSB 5
  2338. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_LSB 5
  2339. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_INDEX 1
  2340. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_ENUM_POS 0
  2341. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_ENUM_NEG 1
  2342. /* macros for field IRCAL_AMP_MAG access */
  2343. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_TYPE uint8_t
  2344. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_SIZE 5
  2345. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_MASK 0x1f
  2346. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_MSB 4
  2347. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_LSB 0
  2348. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_INDEX 1
  2349. /* macros for entire REPLY IRCAL_PH_REPLY access of type uint8_t */
  2350. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_TYPE uint8_t
  2351. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_SIZE 8
  2352. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_MASK 0xff
  2353. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_MSB 7
  2354. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_LSB 0
  2355. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_INDEX 2
  2356. /* macros for field IRCAL_PH_SIGN access */
  2357. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_TYPE enum
  2358. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_SIZE 1
  2359. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_MASK 0x20
  2360. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_BIT 0x20
  2361. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_MSB 5
  2362. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_LSB 5
  2363. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_INDEX 2
  2364. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_ENUM_POS 0
  2365. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_ENUM_NEG 1
  2366. /* macros for field IRCAL_AMP_PH access */
  2367. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_TYPE uint8_t
  2368. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_SIZE 5
  2369. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_MASK 0x1f
  2370. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_MSB 4
  2371. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_LSB 0
  2372. #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_INDEX 2
  2373. /* tx commands */
  2374. #define SI446X_CMD_ID_START_TX 0x31
  2375. /* START_TX ARGS */
  2376. #define SI446X_CMD_ARG_COUNT_START_TX 7
  2377. /* macros for entire ARG CHANNEL access of type uint8_t */
  2378. #define SI446X_CMD_START_TX_ARG_CHANNEL_TYPE uint8_t
  2379. #define SI446X_CMD_START_TX_ARG_CHANNEL_SIZE 8
  2380. #define SI446X_CMD_START_TX_ARG_CHANNEL_MASK 0xff
  2381. #define SI446X_CMD_START_TX_ARG_CHANNEL_MSB 7
  2382. #define SI446X_CMD_START_TX_ARG_CHANNEL_LSB 0
  2383. #define SI446X_CMD_START_TX_ARG_CHANNEL_INDEX 1
  2384. #define SI446X_CMD_START_TX_ARG_CHANNEL_value (((cmd.arg.START_TX.CHANNEL)))
  2385. /* macros for field CHANNEL access */
  2386. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_TYPE uint8_t
  2387. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_SIZE 8
  2388. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MASK 0xff
  2389. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MSB 7
  2390. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_LSB 0
  2391. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_INDEX 1
  2392. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MIN 0x0
  2393. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MAX 0xff
  2394. #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_value (((cmd.arg.START_TX.CHANNEL & 0xff)))
  2395. /* macros for entire ARG CONDITION access of type uint8_t */
  2396. #define SI446X_CMD_START_TX_ARG_CONDITION_TYPE uint8_t
  2397. #define SI446X_CMD_START_TX_ARG_CONDITION_SIZE 8
  2398. #define SI446X_CMD_START_TX_ARG_CONDITION_MASK 0xff
  2399. #define SI446X_CMD_START_TX_ARG_CONDITION_MSB 7
  2400. #define SI446X_CMD_START_TX_ARG_CONDITION_LSB 0
  2401. #define SI446X_CMD_START_TX_ARG_CONDITION_INDEX 2
  2402. #define SI446X_CMD_START_TX_ARG_CONDITION_value (((cmd.arg.START_TX.CONDITION)))
  2403. /* macros for field TXCOMPLETE_STATE access */
  2404. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_TYPE enum
  2405. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_SIZE 4
  2406. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_MASK 0xf0
  2407. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_MSB 7
  2408. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_LSB 4
  2409. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_INDEX 2
  2410. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_value (((cmd.arg.START_TX.CONDITION & 0xf0)) >> 4)
  2411. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_NOCHANGE 0
  2412. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_SLEEP 1
  2413. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_SPI_ACTIVE 2
  2414. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_READY 3
  2415. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_READY2 4
  2416. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_TX_TUNE 5
  2417. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RX_TUNE 6
  2418. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RESERVED 7
  2419. #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RX 8
  2420. /* macros for field UPDATE access */
  2421. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_TYPE enum
  2422. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_SIZE 1
  2423. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_MASK 0x8
  2424. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_BIT 0x8
  2425. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_MSB 3
  2426. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_LSB 3
  2427. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_INDEX 2
  2428. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_is_true (cmd.arg.START_TX.CONDITION & 0x8)
  2429. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_value (((cmd.arg.START_TX.CONDITION & 0x8)) >> 3)
  2430. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_ENUM_UPDATE 1
  2431. #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_ENUM_USE 0
  2432. /* macros for field RETRANSMIT access */
  2433. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_TYPE enum
  2434. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_SIZE 1
  2435. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_MASK 0x4
  2436. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_BIT 0x4
  2437. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_MSB 2
  2438. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_LSB 2
  2439. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_INDEX 2
  2440. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_is_true (cmd.arg.START_TX.CONDITION & 0x4)
  2441. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_value (((cmd.arg.START_TX.CONDITION & 0x4)) >> 2)
  2442. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_ENUM_ENUM_0 0
  2443. #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_ENUM_ENUM_1 1
  2444. /* macros for field START access */
  2445. #define SI446X_CMD_START_TX_ARG_CONDITION_START_TYPE enum
  2446. #define SI446X_CMD_START_TX_ARG_CONDITION_START_SIZE 2
  2447. #define SI446X_CMD_START_TX_ARG_CONDITION_START_MASK 0x3
  2448. #define SI446X_CMD_START_TX_ARG_CONDITION_START_MSB 1
  2449. #define SI446X_CMD_START_TX_ARG_CONDITION_START_LSB 0
  2450. #define SI446X_CMD_START_TX_ARG_CONDITION_START_INDEX 2
  2451. #define SI446X_CMD_START_TX_ARG_CONDITION_START_value (((cmd.arg.START_TX.CONDITION & 0x3)))
  2452. #define SI446X_CMD_START_TX_ARG_CONDITION_START_ENUM_IMMEDIATE 0
  2453. #define SI446X_CMD_START_TX_ARG_CONDITION_START_ENUM_WUT 1
  2454. /* macros for entire ARG TX_LEN access of type uint16_t */
  2455. #define SI446X_CMD_START_TX_ARG_TX_LEN_TYPE uint16_t
  2456. #define SI446X_CMD_START_TX_ARG_TX_LEN_SIZE 16
  2457. #define SI446X_CMD_START_TX_ARG_TX_LEN_MASK 0xffff
  2458. #define SI446X_CMD_START_TX_ARG_TX_LEN_MSB 15
  2459. #define SI446X_CMD_START_TX_ARG_TX_LEN_LSB 0
  2460. #define SI446X_CMD_START_TX_ARG_TX_LEN_INDEX 3
  2461. #define SI446X_CMD_START_TX_ARG_TX_LEN_value (((cmd.arg.START_TX.TX_LEN)))
  2462. /* macros for field TX_LEN access */
  2463. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_TYPE uint16_t
  2464. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_SIZE 13
  2465. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MASK 0x1fff
  2466. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MSB 12
  2467. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_LSB 0
  2468. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_INDEX 3
  2469. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MIN 0x0
  2470. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MAX 0x1fff
  2471. #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_value (((cmd.arg.START_TX.TX_LEN & 0x1fff)))
  2472. /* macros for entire ARG TX_DELAY access of type uint8_t */
  2473. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TYPE uint8_t
  2474. #define SI446X_CMD_START_TX_ARG_TX_DELAY_SIZE 8
  2475. #define SI446X_CMD_START_TX_ARG_TX_DELAY_MASK 0xff
  2476. #define SI446X_CMD_START_TX_ARG_TX_DELAY_MSB 7
  2477. #define SI446X_CMD_START_TX_ARG_TX_DELAY_LSB 0
  2478. #define SI446X_CMD_START_TX_ARG_TX_DELAY_INDEX 5
  2479. #define SI446X_CMD_START_TX_ARG_TX_DELAY_value (((cmd.arg.START_TX.TX_DELAY)))
  2480. /* macros for field TX_DELAY access */
  2481. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_TYPE uint8_t
  2482. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_SIZE 8
  2483. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MASK 0xff
  2484. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MSB 7
  2485. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_LSB 0
  2486. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_INDEX 5
  2487. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MIN 0x0
  2488. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MAX 0x80
  2489. #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_value (((cmd.arg.START_TX.TX_DELAY & 0xff)))
  2490. /* macros for entire ARG NUM_REPEAT access of type uint8_t */
  2491. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_TYPE uint8_t
  2492. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_SIZE 8
  2493. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_MASK 0xff
  2494. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_MSB 7
  2495. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_LSB 0
  2496. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_INDEX 6
  2497. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_value (((cmd.arg.START_TX.NUM_REPEAT)))
  2498. /* macros for field NUM_REPEAT access */
  2499. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_TYPE uint8_t
  2500. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_SIZE 8
  2501. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MASK 0xff
  2502. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MSB 7
  2503. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_LSB 0
  2504. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_INDEX 6
  2505. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MIN 0x0
  2506. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MAX 0xff
  2507. #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_value (((cmd.arg.START_TX.NUM_REPEAT & 0xff)))
  2508. /* START_TX REPLY */
  2509. #define SI446X_CMD_REPLY_COUNT_START_TX 0
  2510. #define SI446X_CMD_ID_TX_HOP 0x37
  2511. /* TX_HOP ARGS */
  2512. #define SI446X_CMD_ARG_COUNT_TX_HOP 1
  2513. /* TX_HOP REPLY */
  2514. #define SI446X_CMD_REPLY_COUNT_TX_HOP 0
  2515. #define SI446X_CMD_ID_WRITE_TX_FIFO 0x66
  2516. /* WRITE_TX_FIFO ARGS */
  2517. #define SI446X_CMD_ARG_COUNT_WRITE_TX_FIFO 3
  2518. /* macros for entire ARG DATA access of type uint8_t */
  2519. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_TYPE uint8_t
  2520. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_SIZE 8
  2521. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_MASK 0xff
  2522. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_MSB 7
  2523. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_LSB 0
  2524. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_INDEX 1
  2525. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_ARRAY_LEN 2
  2526. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_value(i) (((cmd.arg.WRITE_TX_FIFO.DATA[(i)])))
  2527. /* macros for field DATA access */
  2528. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_TYPE uint8_t
  2529. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_SIZE 8
  2530. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_MASK 0xff
  2531. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_MSB 7
  2532. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_LSB 0
  2533. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_INDEX 1
  2534. #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_value(i) (((cmd.arg.WRITE_TX_FIFO.DATA[(i)] & 0xff)))
  2535. /* rx commands */
  2536. #define SI446X_CMD_ID_PACKET_INFO 0x16
  2537. /* PACKET_INFO ARGS */
  2538. #define SI446X_CMD_ARG_COUNT_PACKET_INFO 6
  2539. /* macros for entire ARG FIELD_NUMBER access of type uint8_t */
  2540. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_TYPE uint8_t
  2541. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_SIZE 8
  2542. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_MASK 0xff
  2543. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_MSB 7
  2544. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_LSB 0
  2545. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_INDEX 1
  2546. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_value (((cmd.arg.PACKET_INFO.FIELD_NUMBER)))
  2547. /* macros for field FIELD_NUM access */
  2548. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_TYPE enum
  2549. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_SIZE 5
  2550. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_MASK 0x1f
  2551. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_MSB 4
  2552. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_LSB 0
  2553. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_INDEX 1
  2554. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_value (((cmd.arg.PACKET_INFO.FIELD_NUMBER & 0x1f)))
  2555. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_0 0
  2556. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_1 1
  2557. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_2 2
  2558. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_3 4
  2559. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_4 8
  2560. #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_5 16
  2561. /* macros for entire ARG LEN access of type uint16_t */
  2562. #define SI446X_CMD_PACKET_INFO_ARG_LEN_TYPE uint16_t
  2563. #define SI446X_CMD_PACKET_INFO_ARG_LEN_SIZE 16
  2564. #define SI446X_CMD_PACKET_INFO_ARG_LEN_MASK 0xffff
  2565. #define SI446X_CMD_PACKET_INFO_ARG_LEN_MSB 15
  2566. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LSB 0
  2567. #define SI446X_CMD_PACKET_INFO_ARG_LEN_INDEX 2
  2568. #define SI446X_CMD_PACKET_INFO_ARG_LEN_value (((cmd.arg.PACKET_INFO.LEN)))
  2569. /* macros for field LEN access */
  2570. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_TYPE uint16_t
  2571. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_SIZE 16
  2572. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MASK 0xffff
  2573. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MSB 15
  2574. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_LSB 0
  2575. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_INDEX 2
  2576. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MIN 0x1
  2577. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MAX 0x1fff
  2578. #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_value (((cmd.arg.PACKET_INFO.LEN & 0xffff)))
  2579. /* macros for entire ARG LEN_DIFF access of type S16 */
  2580. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_TYPE S16
  2581. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_SIZE 16
  2582. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_MASK 0xffff
  2583. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_MSB 15
  2584. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LSB 0
  2585. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_INDEX 4
  2586. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_value (((cmd.arg.PACKET_INFO.LEN_DIFF)))
  2587. /* macros for field LEN_DIFF access */
  2588. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_TYPE S16
  2589. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_SIZE 16
  2590. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MASK 0xffff
  2591. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MSB 15
  2592. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_LSB 0
  2593. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_INDEX 4
  2594. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MIN -0x8000
  2595. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MAX 0x7fff
  2596. #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_value (((cmd.arg.PACKET_INFO.LEN_DIFF & 0xffff)))
  2597. /* PACKET_INFO REPLY */
  2598. #define SI446X_CMD_REPLY_COUNT_PACKET_INFO 2
  2599. /* macros for entire REPLY LENGTH access of type uint16_t */
  2600. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_TYPE uint16_t
  2601. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_SIZE 16
  2602. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_MASK 0xffff
  2603. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_MSB 15
  2604. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LSB 0
  2605. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_INDEX 1
  2606. /* macros for field LENGTH access */
  2607. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_TYPE uint16_t
  2608. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_SIZE 16
  2609. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_MASK 0xffff
  2610. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_MSB 15
  2611. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_LSB 0
  2612. #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_INDEX 1
  2613. #define SI446X_CMD_ID_GET_MODEM_STATUS 0x22
  2614. /* GET_MODEM_STATUS ARGS */
  2615. #define SI446X_CMD_ARG_COUNT_GET_MODEM_STATUS 2
  2616. /* macros for entire ARG MODEM_CLR_PEND access of type uint8_t */
  2617. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_TYPE uint8_t
  2618. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SIZE 8
  2619. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_MASK 0xff
  2620. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_MSB 7
  2621. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_LSB 0
  2622. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INDEX 1
  2623. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND)))
  2624. /* macros for field RSSI_LATCH_PEND_CLR access */
  2625. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_TYPE bool
  2626. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_SIZE 1
  2627. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MASK 0x80
  2628. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_BIT 0x80
  2629. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MSB 7
  2630. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_LSB 7
  2631. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_INDEX 1
  2632. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x80)
  2633. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x80)) >> 7)
  2634. /* macros for field POSTAMBLE_DETECT_PEND_CLR access */
  2635. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_TYPE bool
  2636. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_SIZE 1
  2637. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MASK 0x40
  2638. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_BIT 0x40
  2639. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MSB 6
  2640. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_LSB 6
  2641. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_INDEX 1
  2642. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x40)
  2643. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x40)) >> 6)
  2644. /* macros for field INVALID_SYNC_PEND_CLR access */
  2645. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_TYPE bool
  2646. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_SIZE 1
  2647. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MASK 0x20
  2648. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_BIT 0x20
  2649. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MSB 5
  2650. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_LSB 5
  2651. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_INDEX 1
  2652. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x20)
  2653. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x20)) >> 5)
  2654. /* macros for field RSSI_JUMP_PEND_CLR access */
  2655. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_TYPE bool
  2656. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_SIZE 1
  2657. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MASK 0x10
  2658. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_BIT 0x10
  2659. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MSB 4
  2660. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_LSB 4
  2661. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_INDEX 1
  2662. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x10)
  2663. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x10)) >> 4)
  2664. /* macros for field RSSI_PEND_CLR access */
  2665. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_TYPE bool
  2666. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_SIZE 1
  2667. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MASK 0x8
  2668. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_BIT 0x8
  2669. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MSB 3
  2670. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_LSB 3
  2671. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_INDEX 1
  2672. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x8)
  2673. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x8)) >> 3)
  2674. /* macros for field INVALID_PREAMBLE_PEND_CLR access */
  2675. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_TYPE bool
  2676. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_SIZE 1
  2677. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MASK 0x4
  2678. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_BIT 0x4
  2679. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MSB 2
  2680. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_LSB 2
  2681. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_INDEX 1
  2682. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x4)
  2683. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x4)) >> 2)
  2684. /* macros for field PREAMBLE_DETECT_PEND_CLR access */
  2685. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_TYPE bool
  2686. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_SIZE 1
  2687. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MASK 0x2
  2688. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_BIT 0x2
  2689. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MSB 1
  2690. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_LSB 1
  2691. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_INDEX 1
  2692. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x2)
  2693. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x2)) >> 1)
  2694. /* macros for field SYNC_DETECT_PEND_CLR access */
  2695. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_TYPE bool
  2696. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_SIZE 1
  2697. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MASK 0x1
  2698. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_BIT 0x1
  2699. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MSB 0
  2700. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_LSB 0
  2701. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_INDEX 1
  2702. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x1)
  2703. #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x1)))
  2704. /* GET_MODEM_STATUS REPLY */
  2705. #define SI446X_CMD_REPLY_COUNT_GET_MODEM_STATUS 8
  2706. /* macros for entire REPLY MODEM_PEND access of type uint8_t */
  2707. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_TYPE uint8_t
  2708. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SIZE 8
  2709. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_MASK 0xff
  2710. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_MSB 7
  2711. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_LSB 0
  2712. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INDEX 1
  2713. /* macros for field RSSI_LATCH_PEND access */
  2714. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_TYPE bool
  2715. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_SIZE 1
  2716. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MASK 0x80
  2717. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_BIT 0x80
  2718. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MSB 7
  2719. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_LSB 7
  2720. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_INDEX 1
  2721. /* macros for field POSTAMBLE_DETECT_PEND access */
  2722. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_TYPE bool
  2723. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_SIZE 1
  2724. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MASK 0x40
  2725. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_BIT 0x40
  2726. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MSB 6
  2727. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_LSB 6
  2728. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_INDEX 1
  2729. /* macros for field INVALID_SYNC_PEND access */
  2730. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_TYPE bool
  2731. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_SIZE 1
  2732. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MASK 0x20
  2733. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_BIT 0x20
  2734. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MSB 5
  2735. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_LSB 5
  2736. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_INDEX 1
  2737. /* macros for field RSSI_JUMP_PEND access */
  2738. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_TYPE bool
  2739. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_SIZE 1
  2740. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MASK 0x10
  2741. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_BIT 0x10
  2742. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MSB 4
  2743. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_LSB 4
  2744. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_INDEX 1
  2745. /* macros for field RSSI_PEND access */
  2746. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_TYPE bool
  2747. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_SIZE 1
  2748. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_MASK 0x8
  2749. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_BIT 0x8
  2750. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_MSB 3
  2751. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_LSB 3
  2752. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_INDEX 1
  2753. /* macros for field INVALID_PREAMBLE_PEND access */
  2754. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_TYPE bool
  2755. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_SIZE 1
  2756. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MASK 0x4
  2757. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_BIT 0x4
  2758. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MSB 2
  2759. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_LSB 2
  2760. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_INDEX 1
  2761. /* macros for field PREAMBLE_DETECT_PEND access */
  2762. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_TYPE bool
  2763. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_SIZE 1
  2764. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MASK 0x2
  2765. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_BIT 0x2
  2766. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MSB 1
  2767. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_LSB 1
  2768. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_INDEX 1
  2769. /* macros for field SYNC_DETECT_PEND access */
  2770. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_TYPE bool
  2771. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_SIZE 1
  2772. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MASK 0x1
  2773. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_BIT 0x1
  2774. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MSB 0
  2775. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_LSB 0
  2776. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_INDEX 1
  2777. /* macros for entire REPLY MODEM_STATUS access of type uint8_t */
  2778. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_TYPE uint8_t
  2779. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SIZE 8
  2780. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_MASK 0xff
  2781. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_MSB 7
  2782. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_LSB 0
  2783. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INDEX 2
  2784. /* macros for field RSSI_LATCH access */
  2785. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_TYPE bool
  2786. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_SIZE 1
  2787. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MASK 0x80
  2788. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_BIT 0x80
  2789. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MSB 7
  2790. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_LSB 7
  2791. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_INDEX 2
  2792. /* macros for field POSTAMBLE_DETECT access */
  2793. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_TYPE bool
  2794. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_SIZE 1
  2795. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MASK 0x40
  2796. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_BIT 0x40
  2797. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MSB 6
  2798. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_LSB 6
  2799. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_INDEX 2
  2800. /* macros for field INVALID_SYNC access */
  2801. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_TYPE bool
  2802. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_SIZE 1
  2803. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MASK 0x20
  2804. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_BIT 0x20
  2805. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MSB 5
  2806. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_LSB 5
  2807. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_INDEX 2
  2808. /* macros for field RSSI_JUMP access */
  2809. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_TYPE bool
  2810. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_SIZE 1
  2811. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MASK 0x10
  2812. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_BIT 0x10
  2813. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MSB 4
  2814. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_LSB 4
  2815. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_INDEX 2
  2816. /* macros for field RSSI access */
  2817. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_TYPE bool
  2818. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_SIZE 1
  2819. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_MASK 0x8
  2820. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_BIT 0x8
  2821. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_MSB 3
  2822. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LSB 3
  2823. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_INDEX 2
  2824. /* macros for field INVALID_PREAMBLE access */
  2825. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_TYPE bool
  2826. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_SIZE 1
  2827. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MASK 0x4
  2828. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_BIT 0x4
  2829. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MSB 2
  2830. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_LSB 2
  2831. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_INDEX 2
  2832. /* macros for field PREAMBLE_DETECT access */
  2833. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_TYPE bool
  2834. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_SIZE 1
  2835. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MASK 0x2
  2836. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_BIT 0x2
  2837. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MSB 1
  2838. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_LSB 1
  2839. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_INDEX 2
  2840. /* macros for field SYNC_DETECT access */
  2841. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_TYPE bool
  2842. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_SIZE 1
  2843. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MASK 0x1
  2844. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_BIT 0x1
  2845. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MSB 0
  2846. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_LSB 0
  2847. #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_INDEX 2
  2848. /* macros for entire REPLY CURR_RSSI access of type uint8_t */
  2849. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_TYPE uint8_t
  2850. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_SIZE 8
  2851. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_MASK 0xff
  2852. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_MSB 7
  2853. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_LSB 0
  2854. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_INDEX 3
  2855. /* macros for field CURR_RSSI access */
  2856. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_TYPE uint8_t
  2857. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_SIZE 8
  2858. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_MASK 0xff
  2859. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_MSB 7
  2860. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_LSB 0
  2861. #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_INDEX 3
  2862. /* macros for entire REPLY LATCH_RSSI access of type uint8_t */
  2863. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_TYPE uint8_t
  2864. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_SIZE 8
  2865. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_MASK 0xff
  2866. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_MSB 7
  2867. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LSB 0
  2868. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_INDEX 4
  2869. /* macros for field LATCH_RSSI access */
  2870. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_TYPE uint8_t
  2871. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_SIZE 8
  2872. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_MASK 0xff
  2873. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_MSB 7
  2874. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_LSB 0
  2875. #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_INDEX 4
  2876. /* macros for entire REPLY ANT1_RSSI access of type uint8_t */
  2877. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_TYPE uint8_t
  2878. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_SIZE 8
  2879. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_MASK 0xff
  2880. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_MSB 7
  2881. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_LSB 0
  2882. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_INDEX 5
  2883. /* macros for field ANT1_RSSI access */
  2884. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_TYPE uint8_t
  2885. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_SIZE 8
  2886. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_MASK 0xff
  2887. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_MSB 7
  2888. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_LSB 0
  2889. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_INDEX 5
  2890. /* macros for entire REPLY ANT2_RSSI access of type uint8_t */
  2891. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_TYPE uint8_t
  2892. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_SIZE 8
  2893. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_MASK 0xff
  2894. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_MSB 7
  2895. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_LSB 0
  2896. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_INDEX 6
  2897. /* macros for field ANT2_RSSI access */
  2898. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_TYPE uint8_t
  2899. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_SIZE 8
  2900. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_MASK 0xff
  2901. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_MSB 7
  2902. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_LSB 0
  2903. #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_INDEX 6
  2904. /* macros for entire REPLY AFC_FREQ_OFFSET access of type uint16_t */
  2905. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_TYPE uint16_t
  2906. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_SIZE 16
  2907. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_MASK 0xffff
  2908. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_MSB 15
  2909. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_LSB 0
  2910. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_INDEX 7
  2911. /* macros for field AFC_FREQ_OFFSET access */
  2912. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_TYPE uint16_t
  2913. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_SIZE 16
  2914. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_MASK 0xffff
  2915. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_MSB 15
  2916. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_LSB 0
  2917. #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_INDEX 7
  2918. #define SI446X_CMD_ID_START_RX 0x32
  2919. /* START_RX ARGS */
  2920. #define SI446X_CMD_ARG_COUNT_START_RX 8
  2921. /* macros for entire ARG CHANNEL access of type uint8_t */
  2922. #define SI446X_CMD_START_RX_ARG_CHANNEL_TYPE uint8_t
  2923. #define SI446X_CMD_START_RX_ARG_CHANNEL_SIZE 8
  2924. #define SI446X_CMD_START_RX_ARG_CHANNEL_MASK 0xff
  2925. #define SI446X_CMD_START_RX_ARG_CHANNEL_MSB 7
  2926. #define SI446X_CMD_START_RX_ARG_CHANNEL_LSB 0
  2927. #define SI446X_CMD_START_RX_ARG_CHANNEL_INDEX 1
  2928. #define SI446X_CMD_START_RX_ARG_CHANNEL_value (((cmd.arg.START_RX.CHANNEL)))
  2929. /* macros for field CHANNEL access */
  2930. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_TYPE uint8_t
  2931. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_SIZE 8
  2932. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MASK 0xff
  2933. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MSB 7
  2934. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_LSB 0
  2935. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_INDEX 1
  2936. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MIN 0x0
  2937. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MAX 0xff
  2938. #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_value (((cmd.arg.START_RX.CHANNEL & 0xff)))
  2939. /* macros for entire ARG CONDITION access of type uint8_t */
  2940. #define SI446X_CMD_START_RX_ARG_CONDITION_TYPE uint8_t
  2941. #define SI446X_CMD_START_RX_ARG_CONDITION_SIZE 8
  2942. #define SI446X_CMD_START_RX_ARG_CONDITION_MASK 0xff
  2943. #define SI446X_CMD_START_RX_ARG_CONDITION_MSB 7
  2944. #define SI446X_CMD_START_RX_ARG_CONDITION_LSB 0
  2945. #define SI446X_CMD_START_RX_ARG_CONDITION_INDEX 2
  2946. #define SI446X_CMD_START_RX_ARG_CONDITION_value (((cmd.arg.START_RX.CONDITION)))
  2947. /* macros for field UPDATE access */
  2948. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_TYPE enum
  2949. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_SIZE 1
  2950. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_MASK 0x8
  2951. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_BIT 0x8
  2952. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_MSB 3
  2953. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_LSB 3
  2954. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_INDEX 2
  2955. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_is_true (cmd.arg.START_RX.CONDITION & 0x8)
  2956. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_value (((cmd.arg.START_RX.CONDITION & 0x8)) >> 3)
  2957. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_ENUM_UPDATE 1
  2958. #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_ENUM_USE 0
  2959. /* macros for field START access */
  2960. #define SI446X_CMD_START_RX_ARG_CONDITION_START_TYPE enum
  2961. #define SI446X_CMD_START_RX_ARG_CONDITION_START_SIZE 2
  2962. #define SI446X_CMD_START_RX_ARG_CONDITION_START_MASK 0x3
  2963. #define SI446X_CMD_START_RX_ARG_CONDITION_START_MSB 1
  2964. #define SI446X_CMD_START_RX_ARG_CONDITION_START_LSB 0
  2965. #define SI446X_CMD_START_RX_ARG_CONDITION_START_INDEX 2
  2966. #define SI446X_CMD_START_RX_ARG_CONDITION_START_value (((cmd.arg.START_RX.CONDITION & 0x3)))
  2967. #define SI446X_CMD_START_RX_ARG_CONDITION_START_ENUM_IMMEDIATE 0
  2968. #define SI446X_CMD_START_RX_ARG_CONDITION_START_ENUM_WUT 1
  2969. /* macros for entire ARG RX_LEN access of type uint16_t */
  2970. #define SI446X_CMD_START_RX_ARG_RX_LEN_TYPE uint16_t
  2971. #define SI446X_CMD_START_RX_ARG_RX_LEN_SIZE 16
  2972. #define SI446X_CMD_START_RX_ARG_RX_LEN_MASK 0xffff
  2973. #define SI446X_CMD_START_RX_ARG_RX_LEN_MSB 15
  2974. #define SI446X_CMD_START_RX_ARG_RX_LEN_LSB 0
  2975. #define SI446X_CMD_START_RX_ARG_RX_LEN_INDEX 3
  2976. #define SI446X_CMD_START_RX_ARG_RX_LEN_value (((cmd.arg.START_RX.RX_LEN)))
  2977. /* macros for field RX_LEN access */
  2978. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_TYPE uint16_t
  2979. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_SIZE 13
  2980. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MASK 0x1fff
  2981. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MSB 12
  2982. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_LSB 0
  2983. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_INDEX 3
  2984. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MIN 0x0
  2985. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MAX 0x1fff
  2986. #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_value (((cmd.arg.START_RX.RX_LEN & 0x1fff)))
  2987. /* macros for entire ARG NEXT_STATE1 access of type uint8_t */
  2988. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_TYPE uint8_t
  2989. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_SIZE 8
  2990. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_MASK 0xff
  2991. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_MSB 7
  2992. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_LSB 0
  2993. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_INDEX 5
  2994. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_value (((cmd.arg.START_RX.NEXT_STATE1)))
  2995. /* macros for field RXTIMEOUT_STATE access */
  2996. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_TYPE enum
  2997. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_SIZE 4
  2998. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_MASK 0xf
  2999. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_MSB 3
  3000. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_LSB 0
  3001. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_INDEX 5
  3002. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_value (((cmd.arg.START_RX.NEXT_STATE1 & 0xf)))
  3003. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_NOCHANGE 0
  3004. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_SLEEP 1
  3005. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_SPI_ACTIVE 2
  3006. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_READY 3
  3007. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_READY2 4
  3008. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_TX_TUNE 5
  3009. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX_TUNE 6
  3010. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_TX 7
  3011. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX 8
  3012. #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX_IDLE 9
  3013. /* macros for entire ARG NEXT_STATE2 access of type uint8_t */
  3014. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_TYPE uint8_t
  3015. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_SIZE 8
  3016. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_MASK 0xff
  3017. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_MSB 7
  3018. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_LSB 0
  3019. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_INDEX 6
  3020. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_value (((cmd.arg.START_RX.NEXT_STATE2)))
  3021. /* macros for field RXVALID_STATE access */
  3022. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_TYPE enum
  3023. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_SIZE 4
  3024. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_MASK 0xf
  3025. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_MSB 3
  3026. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_LSB 0
  3027. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_INDEX 6
  3028. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_value (((cmd.arg.START_RX.NEXT_STATE2 & 0xf)))
  3029. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_REMAIN 0
  3030. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_SLEEP 1
  3031. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_SPI_ACTIVE 2
  3032. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_READY 3
  3033. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_READY2 4
  3034. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_TX_TUNE 5
  3035. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_RX_TUNE 6
  3036. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_TX 7
  3037. #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_RX 8
  3038. /* macros for entire ARG NEXT_STATE3 access of type uint8_t */
  3039. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_TYPE uint8_t
  3040. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_SIZE 8
  3041. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_MASK 0xff
  3042. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_MSB 7
  3043. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_LSB 0
  3044. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_INDEX 7
  3045. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_value (((cmd.arg.START_RX.NEXT_STATE3)))
  3046. /* macros for field RXINVALID_STATE access */
  3047. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_TYPE enum
  3048. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_SIZE 4
  3049. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_MASK 0xf
  3050. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_MSB 3
  3051. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_LSB 0
  3052. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_INDEX 7
  3053. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_value (((cmd.arg.START_RX.NEXT_STATE3 & 0xf)))
  3054. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_REMAIN 0
  3055. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_SLEEP 1
  3056. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_SPI_ACTIVE 2
  3057. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_READY 3
  3058. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_READY2 4
  3059. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_TX_TUNE 5
  3060. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_RX_TUNE 6
  3061. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_TX 7
  3062. #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_RX 8
  3063. /* START_RX REPLY */
  3064. #define SI446X_CMD_REPLY_COUNT_START_RX 0
  3065. #define SI446X_CMD_ID_RX_HOP 0x36
  3066. /* RX_HOP ARGS */
  3067. #define SI446X_CMD_ARG_COUNT_RX_HOP 7
  3068. /* macros for entire ARG INTE access of type uint8_t */
  3069. #define SI446X_CMD_RX_HOP_ARG_INTE_TYPE uint8_t
  3070. #define SI446X_CMD_RX_HOP_ARG_INTE_SIZE 8
  3071. #define SI446X_CMD_RX_HOP_ARG_INTE_MASK 0xff
  3072. #define SI446X_CMD_RX_HOP_ARG_INTE_MSB 7
  3073. #define SI446X_CMD_RX_HOP_ARG_INTE_LSB 0
  3074. #define SI446X_CMD_RX_HOP_ARG_INTE_INDEX 1
  3075. #define SI446X_CMD_RX_HOP_ARG_INTE_value (((cmd.arg.RX_HOP.INTE)))
  3076. /* macros for field INTE access */
  3077. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_TYPE uint8_t
  3078. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_SIZE 8
  3079. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MASK 0xff
  3080. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MSB 7
  3081. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_LSB 0
  3082. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_INDEX 1
  3083. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MIN 0x0
  3084. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MAX 0x7f
  3085. #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_value (((cmd.arg.RX_HOP.INTE & 0xff)))
  3086. /* macros for entire ARG FRAC access of type uint8_t */
  3087. #define SI446X_CMD_RX_HOP_ARG_FRAC_TYPE uint8_t
  3088. #define SI446X_CMD_RX_HOP_ARG_FRAC_SIZE 24
  3089. #define SI446X_CMD_RX_HOP_ARG_FRAC_MASK 0xffffff
  3090. #define SI446X_CMD_RX_HOP_ARG_FRAC_MSB 23
  3091. #define SI446X_CMD_RX_HOP_ARG_FRAC_LSB 0
  3092. #define SI446X_CMD_RX_HOP_ARG_FRAC_INDEX 2
  3093. #define SI446X_CMD_RX_HOP_ARG_FRAC_23_16_value (((cmd.arg.RX_HOP.FRAC[0])))
  3094. #define SI446X_CMD_RX_HOP_ARG_FRAC_15_8_value (((cmd.arg.RX_HOP.FRAC[1])))
  3095. #define SI446X_CMD_RX_HOP_ARG_FRAC_7_0_value (((cmd.arg.RX_HOP.FRAC[2])))
  3096. /* macros for field FRAC access */
  3097. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_TYPE uint8_t
  3098. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_SIZE 20
  3099. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_INDEX 2
  3100. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_MIN 0x80000
  3101. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_MAX 0xfffff
  3102. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_19_16_value (((cmd.arg.RX_HOP.FRAC[0] & 0xf)))
  3103. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_15_8_value (((cmd.arg.RX_HOP.FRAC[1] & 0xff)))
  3104. #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_7_0_value (((cmd.arg.RX_HOP.FRAC[2] & 0xff)))
  3105. /* macros for entire ARG VCO_CNT access of type uint16_t */
  3106. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_TYPE uint16_t
  3107. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_SIZE 16
  3108. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_MASK 0xffff
  3109. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_MSB 15
  3110. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_LSB 0
  3111. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_INDEX 5
  3112. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_value (((cmd.arg.RX_HOP.VCO_CNT)))
  3113. /* macros for field VCO_CNT access */
  3114. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_TYPE uint16_t
  3115. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_SIZE 16
  3116. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MASK 0xffff
  3117. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MSB 15
  3118. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_LSB 0
  3119. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_INDEX 5
  3120. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MIN 0x0
  3121. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MAX 0xffff
  3122. #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_value (((cmd.arg.RX_HOP.VCO_CNT & 0xffff)))
  3123. /* RX_HOP REPLY */
  3124. #define SI446X_CMD_REPLY_COUNT_RX_HOP 0
  3125. #define SI446X_CMD_ID_READ_RX_FIFO 0x77
  3126. /* READ_RX_FIFO ARGS */
  3127. #define SI446X_CMD_ARG_COUNT_READ_RX_FIFO 1
  3128. /* READ_RX_FIFO REPLY */
  3129. #define SI446X_CMD_REPLY_COUNT_READ_RX_FIFO 2
  3130. /* macros for entire REPLY DATA access of type uint8_t */
  3131. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_TYPE uint8_t
  3132. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_SIZE 8
  3133. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_MASK 0xff
  3134. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_MSB 7
  3135. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_LSB 0
  3136. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_INDEX 0
  3137. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_ARRAY_LEN 2
  3138. /* macros for field DATA access */
  3139. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_TYPE uint8_t
  3140. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_SIZE 8
  3141. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_MASK 0xff
  3142. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_MSB 7
  3143. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_LSB 0
  3144. #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_INDEX 0
  3145. /* advanced commands */
  3146. #define SI446X_CMD_ID_GET_ADC_READING 0x14
  3147. /* GET_ADC_READING ARGS */
  3148. #define SI446X_CMD_ARG_COUNT_GET_ADC_READING 3
  3149. /* macros for entire ARG ADC_EN access of type uint8_t */
  3150. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TYPE uint8_t
  3151. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_SIZE 8
  3152. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_MASK 0xff
  3153. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_MSB 7
  3154. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_LSB 0
  3155. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_INDEX 1
  3156. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN)))
  3157. /* macros for field TEMPERATURE_EN access */
  3158. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_TYPE enum
  3159. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_SIZE 1
  3160. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_MASK 0x10
  3161. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_BIT 0x10
  3162. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_MSB 4
  3163. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_LSB 4
  3164. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_INDEX 1
  3165. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x10)
  3166. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x10)) >> 4)
  3167. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_ENUM_ENUM_0 0
  3168. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_ENUM_ENUM_1 1
  3169. /* macros for field BATTERY_VOLTAGE_EN access */
  3170. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_TYPE enum
  3171. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_SIZE 1
  3172. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_MASK 0x8
  3173. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_BIT 0x8
  3174. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_MSB 3
  3175. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_LSB 3
  3176. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_INDEX 1
  3177. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x8)
  3178. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x8)) >> 3)
  3179. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_ENUM_ENUM_0 0
  3180. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_ENUM_ENUM_1 1
  3181. /* macros for field ADC_GPIO_EN access */
  3182. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_TYPE enum
  3183. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_SIZE 1
  3184. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_MASK 0x4
  3185. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_BIT 0x4
  3186. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_MSB 2
  3187. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_LSB 2
  3188. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_INDEX 1
  3189. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x4)
  3190. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x4)) >> 2)
  3191. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_ENUM_ENUM_0 0
  3192. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_ENUM_ENUM_1 1
  3193. /* macros for field ADC_GPIO_PIN access */
  3194. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_TYPE enum
  3195. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_SIZE 2
  3196. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_MASK 0x3
  3197. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_MSB 1
  3198. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_LSB 0
  3199. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_INDEX 1
  3200. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x3)))
  3201. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_0 0
  3202. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_1 1
  3203. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_2 2
  3204. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_3 3
  3205. /* macros for entire ARG ADC_CFG access of type uint8_t */
  3206. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_TYPE uint8_t
  3207. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_SIZE 8
  3208. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_MASK 0xff
  3209. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_MSB 7
  3210. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_LSB 0
  3211. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_INDEX 2
  3212. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_value (((cmd.arg.GET_ADC_READING.ADC_CFG)))
  3213. /* macros for field UDTIME access */
  3214. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_TYPE uint8_t
  3215. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_SIZE 4
  3216. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_MASK 0xf0
  3217. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_MSB 7
  3218. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_LSB 4
  3219. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_INDEX 2
  3220. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_value (((cmd.arg.GET_ADC_READING.ADC_CFG & 0xf0)) >> 4)
  3221. /* macros for field GPIO_ATT access */
  3222. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_TYPE enum
  3223. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_SIZE 4
  3224. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_MASK 0xf
  3225. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_MSB 3
  3226. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_LSB 0
  3227. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_INDEX 2
  3228. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_value (((cmd.arg.GET_ADC_READING.ADC_CFG & 0xf)))
  3229. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_0P8 0
  3230. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_1P6 4
  3231. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_3P2 5
  3232. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_2P4 8
  3233. #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_3P6 9
  3234. /* GET_ADC_READING REPLY */
  3235. #define SI446X_CMD_REPLY_COUNT_GET_ADC_READING 6
  3236. /* macros for entire REPLY GPIO_ADC access of type uint16_t */
  3237. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_TYPE uint16_t
  3238. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_SIZE 16
  3239. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_MASK 0xffff
  3240. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_MSB 15
  3241. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_LSB 0
  3242. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_INDEX 1
  3243. /* macros for field GPIO_ADC access */
  3244. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_TYPE uint16_t
  3245. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_SIZE 11
  3246. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_MASK 0x7ff
  3247. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_MSB 10
  3248. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_LSB 0
  3249. #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_INDEX 1
  3250. /* macros for entire REPLY BATTERY_ADC access of type uint16_t */
  3251. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_TYPE uint16_t
  3252. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_SIZE 16
  3253. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_MASK 0xffff
  3254. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_MSB 15
  3255. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_LSB 0
  3256. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_INDEX 3
  3257. /* macros for field BATTERY_ADC access */
  3258. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_TYPE uint16_t
  3259. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_SIZE 11
  3260. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_MASK 0x7ff
  3261. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_MSB 10
  3262. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_LSB 0
  3263. #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_INDEX 3
  3264. /* macros for entire REPLY TEMP_ADC access of type uint16_t */
  3265. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TYPE uint16_t
  3266. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_SIZE 16
  3267. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_MASK 0xffff
  3268. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_MSB 15
  3269. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_LSB 0
  3270. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_INDEX 5
  3271. /* macros for field TEMP_ADC access */
  3272. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_TYPE uint16_t
  3273. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_SIZE 11
  3274. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_MASK 0x7ff
  3275. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_MSB 10
  3276. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_LSB 0
  3277. #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_INDEX 5
  3278. #define SI446X_CMD_ID_GET_PH_STATUS 0x21
  3279. /* GET_PH_STATUS ARGS */
  3280. #define SI446X_CMD_ARG_COUNT_GET_PH_STATUS 2
  3281. /* macros for entire ARG PH_CLR_PEND access of type uint8_t */
  3282. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TYPE uint8_t
  3283. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_SIZE 8
  3284. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_MASK 0xff
  3285. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_MSB 7
  3286. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_LSB 0
  3287. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_INDEX 1
  3288. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND)))
  3289. /* macros for field FILTER_MATCH_PEND_CLR access */
  3290. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_TYPE bool
  3291. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_SIZE 1
  3292. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MASK 0x80
  3293. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_BIT 0x80
  3294. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MSB 7
  3295. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_LSB 7
  3296. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_INDEX 1
  3297. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x80)
  3298. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x80)) >> 7)
  3299. /* macros for field FILTER_MISS_PEND_CLR access */
  3300. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_TYPE bool
  3301. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_SIZE 1
  3302. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MASK 0x40
  3303. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_BIT 0x40
  3304. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MSB 6
  3305. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_LSB 6
  3306. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_INDEX 1
  3307. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x40)
  3308. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x40)) >> 6)
  3309. /* macros for field PACKET_SENT_PEND_CLR access */
  3310. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_TYPE bool
  3311. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_SIZE 1
  3312. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MASK 0x20
  3313. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_BIT 0x20
  3314. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MSB 5
  3315. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_LSB 5
  3316. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_INDEX 1
  3317. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x20)
  3318. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x20)) >> 5)
  3319. /* macros for field PACKET_RX_PEND_CLR access */
  3320. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_TYPE bool
  3321. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_SIZE 1
  3322. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MASK 0x10
  3323. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_BIT 0x10
  3324. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MSB 4
  3325. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_LSB 4
  3326. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_INDEX 1
  3327. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x10)
  3328. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x10)) >> 4)
  3329. /* macros for field CRC_ERROR_PEND_CLR access */
  3330. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_TYPE bool
  3331. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_SIZE 1
  3332. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MASK 0x8
  3333. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_BIT 0x8
  3334. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MSB 3
  3335. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_LSB 3
  3336. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_INDEX 1
  3337. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x8)
  3338. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x8)) >> 3)
  3339. /* macros for field ALT_CRC_ERROR_PEND_CLR access */
  3340. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_TYPE bool
  3341. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_SIZE 1
  3342. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MASK 0x4
  3343. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_BIT 0x4
  3344. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MSB 2
  3345. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_LSB 2
  3346. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_INDEX 1
  3347. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x4)
  3348. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x4)) >> 2)
  3349. /* macros for field TX_FIFO_ALMOST_EMPTY_PEND_CLR access */
  3350. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_TYPE bool
  3351. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_SIZE 1
  3352. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MASK 0x2
  3353. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_BIT 0x2
  3354. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MSB 1
  3355. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_LSB 1
  3356. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_INDEX 1
  3357. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x2)
  3358. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x2)) >> 1)
  3359. /* macros for field RX_FIFO_ALMOST_FULL_PEND_CLR access */
  3360. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_TYPE bool
  3361. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_SIZE 1
  3362. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MASK 0x1
  3363. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_BIT 0x1
  3364. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MSB 0
  3365. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_LSB 0
  3366. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_INDEX 1
  3367. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x1)
  3368. #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x1)))
  3369. /* GET_PH_STATUS REPLY */
  3370. #define SI446X_CMD_REPLY_COUNT_GET_PH_STATUS 2
  3371. /* macros for entire REPLY PH_PEND access of type uint8_t */
  3372. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TYPE uint8_t
  3373. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_SIZE 8
  3374. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_MASK 0xff
  3375. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_MSB 7
  3376. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_LSB 0
  3377. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_INDEX 1
  3378. /* macros for field FILTER_MATCH_PEND access */
  3379. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_TYPE bool
  3380. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_SIZE 1
  3381. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MASK 0x80
  3382. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_BIT 0x80
  3383. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MSB 7
  3384. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_LSB 7
  3385. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_INDEX 1
  3386. /* macros for field FILTER_MISS_PEND access */
  3387. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_TYPE bool
  3388. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_SIZE 1
  3389. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MASK 0x40
  3390. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_BIT 0x40
  3391. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MSB 6
  3392. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_LSB 6
  3393. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_INDEX 1
  3394. /* macros for field PACKET_SENT_PEND access */
  3395. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_TYPE bool
  3396. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_SIZE 1
  3397. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MASK 0x20
  3398. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_BIT 0x20
  3399. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MSB 5
  3400. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_LSB 5
  3401. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_INDEX 1
  3402. /* macros for field PACKET_RX_PEND access */
  3403. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_TYPE bool
  3404. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_SIZE 1
  3405. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_MASK 0x10
  3406. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_BIT 0x10
  3407. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_MSB 4
  3408. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_LSB 4
  3409. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_INDEX 1
  3410. /* macros for field CRC_ERROR_PEND access */
  3411. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_TYPE bool
  3412. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_SIZE 1
  3413. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MASK 0x8
  3414. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_BIT 0x8
  3415. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MSB 3
  3416. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_LSB 3
  3417. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_INDEX 1
  3418. /* macros for field ALT_CRC_ERROR_PEND access */
  3419. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_TYPE bool
  3420. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_SIZE 1
  3421. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MASK 0x4
  3422. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_BIT 0x4
  3423. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MSB 2
  3424. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_LSB 2
  3425. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_INDEX 1
  3426. /* macros for field TX_FIFO_ALMOST_EMPTY_PEND access */
  3427. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_TYPE bool
  3428. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_SIZE 1
  3429. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MASK 0x2
  3430. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_BIT 0x2
  3431. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MSB 1
  3432. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_LSB 1
  3433. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_INDEX 1
  3434. /* macros for field RX_FIFO_ALMOST_FULL_PEND access */
  3435. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_TYPE bool
  3436. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_SIZE 1
  3437. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MASK 0x1
  3438. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_BIT 0x1
  3439. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MSB 0
  3440. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_LSB 0
  3441. #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_INDEX 1
  3442. /* macros for entire REPLY PH_STATUS access of type uint8_t */
  3443. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TYPE uint8_t
  3444. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_SIZE 8
  3445. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_MASK 0xff
  3446. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_MSB 7
  3447. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_LSB 0
  3448. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_INDEX 2
  3449. /* macros for field FILTER_MATCH access */
  3450. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_TYPE bool
  3451. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_SIZE 1
  3452. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_MASK 0x80
  3453. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_BIT 0x80
  3454. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_MSB 7
  3455. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_LSB 7
  3456. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_INDEX 2
  3457. /* macros for field FILTER_MISS access */
  3458. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_TYPE bool
  3459. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_SIZE 1
  3460. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_MASK 0x40
  3461. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_BIT 0x40
  3462. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_MSB 6
  3463. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_LSB 6
  3464. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_INDEX 2
  3465. /* macros for field PACKET_SENT access */
  3466. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_TYPE bool
  3467. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_SIZE 1
  3468. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_MASK 0x20
  3469. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_BIT 0x20
  3470. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_MSB 5
  3471. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_LSB 5
  3472. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_INDEX 2
  3473. /* macros for field PACKET_RX access */
  3474. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_TYPE bool
  3475. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_SIZE 1
  3476. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_MASK 0x10
  3477. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_BIT 0x10
  3478. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_MSB 4
  3479. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_LSB 4
  3480. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_INDEX 2
  3481. /* macros for field CRC_ERROR access */
  3482. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_TYPE bool
  3483. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_SIZE 1
  3484. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_MASK 0x8
  3485. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_BIT 0x8
  3486. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_MSB 3
  3487. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_LSB 3
  3488. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_INDEX 2
  3489. /* macros for field ALT_CRC_ERROR access */
  3490. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_TYPE bool
  3491. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_SIZE 1
  3492. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MASK 0x4
  3493. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_BIT 0x4
  3494. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MSB 2
  3495. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_LSB 2
  3496. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_INDEX 2
  3497. /* macros for field TX_FIFO_ALMOST_EMPTY access */
  3498. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_TYPE bool
  3499. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_SIZE 1
  3500. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MASK 0x2
  3501. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_BIT 0x2
  3502. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MSB 1
  3503. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_LSB 1
  3504. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_INDEX 2
  3505. /* macros for field RX_FIFO_ALMOST_FULL access */
  3506. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_TYPE bool
  3507. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_SIZE 1
  3508. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MASK 0x1
  3509. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_BIT 0x1
  3510. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MSB 0
  3511. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_LSB 0
  3512. #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_INDEX 2
  3513. #define SI446X_CMD_ID_GET_CHIP_STATUS 0x23
  3514. /* GET_CHIP_STATUS ARGS */
  3515. #define SI446X_CMD_ARG_COUNT_GET_CHIP_STATUS 2
  3516. /* macros for entire ARG CHIP_CLR_PEND access of type uint8_t */
  3517. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_TYPE uint8_t
  3518. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_SIZE 8
  3519. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_MASK 0xff
  3520. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_MSB 7
  3521. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LSB 0
  3522. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_INDEX 1
  3523. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND)))
  3524. /* macros for field CAL_PEND_CLR access */
  3525. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_TYPE bool
  3526. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_SIZE 1
  3527. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MASK 0x40
  3528. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_BIT 0x40
  3529. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MSB 6
  3530. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_LSB 6
  3531. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_INDEX 1
  3532. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x40)
  3533. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x40)) >> 6)
  3534. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR access */
  3535. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_TYPE bool
  3536. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_SIZE 1
  3537. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MASK 0x20
  3538. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_BIT 0x20
  3539. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MSB 5
  3540. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_LSB 5
  3541. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_INDEX 1
  3542. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x20)
  3543. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x20)) >> 5)
  3544. /* macros for field STATE_CHANGE_PEND_CLR access */
  3545. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_TYPE bool
  3546. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_SIZE 1
  3547. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MASK 0x10
  3548. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_BIT 0x10
  3549. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MSB 4
  3550. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_LSB 4
  3551. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_INDEX 1
  3552. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x10)
  3553. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x10)) >> 4)
  3554. /* macros for field CMD_ERROR_PEND_CLR access */
  3555. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_TYPE bool
  3556. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_SIZE 1
  3557. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MASK 0x8
  3558. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_BIT 0x8
  3559. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MSB 3
  3560. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_LSB 3
  3561. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_INDEX 1
  3562. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x8)
  3563. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x8)) >> 3)
  3564. /* macros for field CHIP_READY_PEND_CLR access */
  3565. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_TYPE bool
  3566. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_SIZE 1
  3567. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MASK 0x4
  3568. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_BIT 0x4
  3569. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MSB 2
  3570. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_LSB 2
  3571. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_INDEX 1
  3572. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x4)
  3573. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x4)) >> 2)
  3574. /* macros for field LOW_BATT_PEND_CLR access */
  3575. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_TYPE bool
  3576. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_SIZE 1
  3577. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MASK 0x2
  3578. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_BIT 0x2
  3579. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MSB 1
  3580. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_LSB 1
  3581. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_INDEX 1
  3582. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x2)
  3583. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x2)) >> 1)
  3584. /* macros for field WUT_PEND_CLR access */
  3585. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_TYPE bool
  3586. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_SIZE 1
  3587. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MASK 0x1
  3588. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_BIT 0x1
  3589. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MSB 0
  3590. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_LSB 0
  3591. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_INDEX 1
  3592. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x1)
  3593. #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x1)))
  3594. /* GET_CHIP_STATUS REPLY */
  3595. #define SI446X_CMD_REPLY_COUNT_GET_CHIP_STATUS 4
  3596. /* macros for entire REPLY CHIP_PEND access of type uint8_t */
  3597. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_TYPE uint8_t
  3598. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_SIZE 8
  3599. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_MASK 0xff
  3600. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_MSB 7
  3601. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LSB 0
  3602. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_INDEX 1
  3603. /* macros for field CAL_PEND access */
  3604. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_TYPE bool
  3605. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_SIZE 1
  3606. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_MASK 0x40
  3607. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_BIT 0x40
  3608. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_MSB 6
  3609. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_LSB 6
  3610. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_INDEX 1
  3611. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND access */
  3612. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_TYPE bool
  3613. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_SIZE 1
  3614. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MASK 0x20
  3615. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_BIT 0x20
  3616. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MSB 5
  3617. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_LSB 5
  3618. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_INDEX 1
  3619. /* macros for field STATE_CHANGE_PEND access */
  3620. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_TYPE bool
  3621. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_SIZE 1
  3622. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MASK 0x10
  3623. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_BIT 0x10
  3624. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MSB 4
  3625. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_LSB 4
  3626. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_INDEX 1
  3627. /* macros for field CMD_ERROR_PEND access */
  3628. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_TYPE bool
  3629. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_SIZE 1
  3630. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MASK 0x8
  3631. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_BIT 0x8
  3632. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MSB 3
  3633. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_LSB 3
  3634. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_INDEX 1
  3635. /* macros for field CHIP_READY_PEND access */
  3636. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_TYPE bool
  3637. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_SIZE 1
  3638. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MASK 0x4
  3639. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_BIT 0x4
  3640. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MSB 2
  3641. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_LSB 2
  3642. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_INDEX 1
  3643. /* macros for field LOW_BATT_PEND access */
  3644. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_TYPE bool
  3645. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_SIZE 1
  3646. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MASK 0x2
  3647. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_BIT 0x2
  3648. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MSB 1
  3649. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_LSB 1
  3650. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_INDEX 1
  3651. /* macros for field WUT_PEND access */
  3652. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_TYPE bool
  3653. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_SIZE 1
  3654. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_MASK 0x1
  3655. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_BIT 0x1
  3656. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_MSB 0
  3657. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_LSB 0
  3658. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_INDEX 1
  3659. /* macros for entire REPLY CHIP_STATUS access of type uint8_t */
  3660. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_TYPE uint8_t
  3661. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_SIZE 8
  3662. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_MASK 0xff
  3663. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_MSB 7
  3664. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LSB 0
  3665. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_INDEX 2
  3666. /* macros for field CAL access */
  3667. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_TYPE bool
  3668. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_SIZE 1
  3669. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_MASK 0x40
  3670. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_BIT 0x40
  3671. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_MSB 6
  3672. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_LSB 6
  3673. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_INDEX 2
  3674. /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR access */
  3675. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_TYPE bool
  3676. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_SIZE 1
  3677. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MASK 0x20
  3678. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_BIT 0x20
  3679. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MSB 5
  3680. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_LSB 5
  3681. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_INDEX 2
  3682. /* macros for field STATE_CHANGE access */
  3683. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_TYPE bool
  3684. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_SIZE 1
  3685. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MASK 0x10
  3686. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_BIT 0x10
  3687. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MSB 4
  3688. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_LSB 4
  3689. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_INDEX 2
  3690. /* macros for field CMD_ERROR access */
  3691. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_TYPE bool
  3692. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_SIZE 1
  3693. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_MASK 0x8
  3694. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_BIT 0x8
  3695. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_MSB 3
  3696. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_LSB 3
  3697. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_INDEX 2
  3698. /* macros for field CHIP_READY access */
  3699. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_TYPE bool
  3700. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_SIZE 1
  3701. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_MASK 0x4
  3702. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_BIT 0x4
  3703. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_MSB 2
  3704. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_LSB 2
  3705. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_INDEX 2
  3706. /* macros for field LOW_BATT access */
  3707. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_TYPE bool
  3708. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_SIZE 1
  3709. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_MASK 0x2
  3710. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_BIT 0x2
  3711. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_MSB 1
  3712. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_LSB 1
  3713. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_INDEX 2
  3714. /* macros for field WUT access */
  3715. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_TYPE bool
  3716. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_SIZE 1
  3717. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_MASK 0x1
  3718. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_BIT 0x1
  3719. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_MSB 0
  3720. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_LSB 0
  3721. #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_INDEX 2
  3722. /* macros for entire REPLY CMD_ERR_STATUS access of type uint8_t */
  3723. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_TYPE uint8_t
  3724. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_SIZE 8
  3725. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_MASK 0xff
  3726. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_MSB 7
  3727. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_LSB 0
  3728. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_INDEX 3
  3729. /* macros for field CMD_ERR_STATUS access */
  3730. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_TYPE enum
  3731. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_SIZE 8
  3732. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_MASK 0xff
  3733. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_MSB 7
  3734. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_LSB 0
  3735. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_INDEX 3
  3736. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_NONE 0
  3737. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_COMMAND 16
  3738. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_ARG 17
  3739. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_COMMAND_BUSY 18
  3740. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_INVALID_STATE 19
  3741. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_BOOTMODE 49
  3742. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_PROPERTY 64
  3743. /* macros for entire REPLY CMD_ERR_CMD_ID access of type uint8_t */
  3744. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_TYPE uint8_t
  3745. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_SIZE 8
  3746. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_MASK 0xff
  3747. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_MSB 7
  3748. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_LSB 0
  3749. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_INDEX 4
  3750. /* macros for field CMD_ERR_CMD_ID access */
  3751. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_TYPE enum
  3752. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_SIZE 8
  3753. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_MASK 0xff
  3754. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_MSB 7
  3755. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_LSB 0
  3756. #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_INDEX 4
  3757. #endif /* _SI446X_CMD_H_ */