VGKitBoard_2212S/radio/CC1101.c

#include "CC1101.h"
#include "myRadio_gpio.h"

#define WRITE_BURST 0x40
#define READ_SINGLE 0x80
#define READ_BURST 0xC0

typedef struct
{
  uint8_t addr;
  uint8_t data;
} registerSetting_t;
#if 0
// Address Config = No address check
// Base Frequency = 432.999817
// CRC Autoflush = false
// CRC Enable = true
// Carrier Frequency = 432.999817
// Channel Number = 0
// Channel Spacing = 199.951172
// Data Format = Normal mode
// Data Rate = 1.19948
// Deviation = 5.157471
// Device Address = 0
// Manchester Enable = false
// Modulated = true
// Modulation Format = 2-FSK
// PA Ramping = false
// Packet Length = 255
// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word
// Preamble Count = 4
// RX Filter BW = 58.035714
// Sync Word Qualifier Mode = 30/32 sync word bits detected
// TX Power = 10
// Whitening = false
static const registerSetting_t preferredSettings[] =
    {
        {CCxx0x_IOCFG0, 0x06},
        {CCxx0x_FIFOTHR, 0x47},
        {CCxx0x_PKTCTRL0, 0x05},
        {CCxx0x_FSCTRL1, 0x06},
        {CCxx0x_FREQ2, 0x10},
        {CCxx0x_FREQ1, 0xA7},
        {CCxx0x_FREQ0, 0x62},
        {CCxx0x_MDMCFG4, 0xF6},
        {CCxx0x_MDMCFG3, 0x83},
        {CCxx0x_MDMCFG2, 0x03},
        {CCxx0x_DEVIATN, 0x15},
        {CCxx0x_MCSM0, 0x18},
        {CCxx0x_FOCCFG, 0x16},
        {CCxx0x_WORCTRL, 0xFB},
        {CCxx0x_FSCAL3, 0xE9},
        {CCxx0x_FSCAL2, 0x2A},
        {CCxx0x_FSCAL1, 0x00},
        {CCxx0x_FSCAL0, 0x1F},
        {CCxx0x_TEST2, 0x81},
        {CCxx0x_TEST1, 0x35},
        {CCxx0x_TEST0, 0x09},
};
#define PA_TABLE                                   \
  {                                                \
    0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 \
  } // 10dBm
#endif
#if 1
// Address Config = No address check 
// Base Frequency = 432.999817 
// CRC Autoflush = false 
// CRC Enable = true 
// Carrier Frequency = 432.999817 
// Channel Number = 0 
// Channel Spacing = 199.951172 
// Data Format = Normal mode 
// Data Rate = 4.79794 
// Deviation = 25.390625 
// Device Address = 0 
// Manchester Enable = false 
// Modulated = true 
// Modulation Format = GFSK 
// PA Ramping = false 
// Packet Length = 255 
// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word 
// Preamble Count = 4 
// RX Filter BW = 101.562500 
// Sync Word Qualifier Mode = 30/32 sync word bits detected 
// TX Power = 10 
// Whitening = false 

static const registerSetting_t preferredSettings[]= 
{
  {CCxx0x_IOCFG0,      0x06},
  {CCxx0x_FIFOTHR,     0x47},
  {CCxx0x_PKTCTRL0,    0x05},
  {CCxx0x_FSCTRL1,     0x06},
  {CCxx0x_FREQ2,       0x10},
  {CCxx0x_FREQ1,       0xA7},
  {CCxx0x_FREQ0,       0x62},
  {CCxx0x_MDMCFG4,     0xC7},
  {CCxx0x_MDMCFG3,     0x83},
  {CCxx0x_MDMCFG2,     0x13},
  {CCxx0x_DEVIATN,     0x40},
  {CCxx0x_MCSM0,       0x18},
  {CCxx0x_FOCCFG,      0x16},
  {CCxx0x_AGCCTRL2,    0x43},
  {CCxx0x_WORCTRL,     0xFB},
  {CCxx0x_FSCAL3,      0xE9},
  {CCxx0x_FSCAL2,      0x2A},
  {CCxx0x_FSCAL1,      0x00},
  {CCxx0x_FSCAL0,      0x1F},
  {CCxx0x_TEST2,       0x81},
  {CCxx0x_TEST1,       0x35},
  {CCxx0x_TEST0,       0x09},
};
#define PA_TABLE                                   \
  {                                                \
    0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 \
  } // 10dBm
#endif
#if 0
// Address Config = No address check 
// Base Frequency = 915.000000 
// CRC Autoflush = false 
// CRC Enable = true 
// Carrier Frequency = 915.000000 
// Channel Number = 0 
// Channel Spacing = 199.951172 
// Data Format = Normal mode 
// Data Rate = 4.79794 
// Deviation = 25.390625 
// Device Address = 0 
// Manchester Enable = false 
// Modulated = true 
// Modulation Format = GFSK 
// PA Ramping = false 
// Packet Length = 255 
// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word 
// Preamble Count = 4 
// RX Filter BW = 101.562500 
// Sync Word Qualifier Mode = 30/32 sync word bits detected 
// TX Power = 10 
// Whitening = false 
// PA table 
#define PA_TABLE {0xc3,0x00,0x00,0x00,0x00,0x00,0x00,0x00}

static const registerSetting_t preferredSettings[]= 
{
  {CCxx0x_IOCFG0,      0x06},
  {CCxx0x_FIFOTHR,     0x47},
  {CCxx0x_PKTCTRL0,    0x05},
  {CCxx0x_FSCTRL1,     0x06},
  {CCxx0x_FREQ2,       0x23},
  {CCxx0x_FREQ1,       0x31},
  {CCxx0x_FREQ0,       0x3B},
  {CCxx0x_MDMCFG4,     0xC7},
  {CCxx0x_MDMCFG3,     0x83},
  {CCxx0x_MDMCFG2,     0x13},
  {CCxx0x_DEVIATN,     0x40},
  {CCxx0x_MCSM0,       0x18},
  {CCxx0x_FOCCFG,      0x16},
  {CCxx0x_AGCCTRL2,    0x43},
  {CCxx0x_WORCTRL,     0xFB},
  {CCxx0x_FSCAL3,      0xE9},
  {CCxx0x_FSCAL2,      0x2A},
  {CCxx0x_FSCAL1,      0x00},
  {CCxx0x_FSCAL0,      0x1F},
  {CCxx0x_TEST2,       0x81},
  {CCxx0x_TEST1,       0x35},
  {CCxx0x_TEST0,       0x09},
};
#endif

uint8_t paTable_CCxx0x[8] = PA_TABLE;

unsigned char ReadReg(unsigned char addr)
{
  unsigned char value;
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  addr |= READ_SINGLE;
  myRadioSpi_rwByte(addr);
  value = myRadioSpi_rwByte(0xff);
  BOARD_SPI_NSS_H();

  return value;
}

void WriteReg(unsigned char addr, unsigned char value)
{
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  addr &= ~READ_SINGLE;
  myRadioSpi_rwByte(addr);
  myRadioSpi_rwByte(value);
  BOARD_SPI_NSS_H();
}

unsigned char ReadStatus(unsigned char addr)
{
  unsigned char value;
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  addr |= READ_BURST;
  myRadioSpi_rwByte(addr);
  value = myRadioSpi_rwByte(0xff);
  BOARD_SPI_NSS_H();

  return value;
}
void ReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
{
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  addr |= READ_BURST;
  myRadioSpi_rwByte(addr);
  for (i = 0; i < count; i++)
  {
    buffer[i] = myRadioSpi_rwByte(0xff);
  }
  BOARD_SPI_NSS_H();
}

void WriteBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
{
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  addr &= ~READ_SINGLE;
  addr |= WRITE_BURST;
  myRadioSpi_rwByte(addr);
  for (i = 0; i < count; i++)
  {
    myRadioSpi_rwByte(buffer[i]);
  }
  BOARD_SPI_NSS_H();
}

void Strobe(unsigned char strobe)
{
  unsigned char i;

  BOARD_SPI_NSS_L();
  for (i = 0; i < 100; i++)
    ;
  myRadioSpi_rwByte(strobe);
  BOARD_SPI_NSS_H();
}

void halRfWriteRfSettings(void)
{
  for (uint16_t i = 0; i < sizeof(preferredSettings) / sizeof(registerSetting_t); i++)
  {
    WriteReg(preferredSettings[i].addr, preferredSettings[i].data);
  }
}
void POWER_UP_RESET_CCxx00(void)
{
  unsigned int i;

  BOARD_SPI_NSS_H();
  for (i = 0; i < 10; i++)
    ;
  BOARD_SPI_NSS_L();
  for (i = 0; i < 10; i++)
    ;
  BOARD_SPI_NSS_H();
  for (i = 0; i < 200; i++)
    ;
  Strobe(CCxx0x_SRES);
  for (i = 0; i < 2000; i++)
    ;
}
uint8_t value;
void RfSetup(void)
{
  POWER_UP_RESET_CCxx00();
  halRfWriteRfSettings();
  Strobe(CCxx0x_SIDLE);
  Strobe(CCxx0x_SFRX);
  Strobe(CCxx0x_SFTX);
  Strobe(CCxx0x_SCAL);
  WriteBurstReg(CCxx0x_PATABLE, paTable_CCxx0x, sizeof(paTable_CCxx0x)); // Write PATABLE

  if (ReadReg(preferredSettings[0].addr) != preferredSettings[0].data)
    while (1)
      ; //¼ì²éSPIÊÇ·ñÕý³£Í¨ÐÅ
}
unsigned char SendPacket(unsigned char *txBuffer, unsigned char length)
{
  Strobe(CCxx0x_SIDLE);
  Strobe(CCxx0x_SFTX);
  WriteBurstReg(CCxx0x_TXFIFO, txBuffer, length);
  Strobe(CCxx0x_STX);

  return 1;
}
unsigned char RSSI_dec;
unsigned char ReceivePacket(unsigned char *rxBuffer, unsigned char max_length)
{
  unsigned char packetLength;
  unsigned char status[2];
  Strobe(CCxx0x_SIDLE);

  packetLength = ReadStatus(CCxx0x_RXBYTES);

  if (packetLength & BYTES_IN_RXFIFO)
  {
    packetLength = ReadReg(CCxx0x_RXFIFO);
    if (packetLength < max_length)
    {
      rxBuffer[0] = packetLength;
      ReadBurstReg(CCxx0x_RXFIFO, rxBuffer + 1, packetLength);
      ReadBurstReg(CCxx0x_RXFIFO, status, 2);
      RSSI_dec = status[RSSI];
      Strobe(CCxx0x_SFRX);
      return !!(status[LQI] & CRC_OK);
    }
    else
    {
      Strobe(CCxx0x_SFRX);
      return 0;
    }
  }
  else
  {
    Strobe(CCxx0x_SFRX);
    return 0;
  }
}