;/****************************************************************************** ; * Copyright (C) 2021, Xiaohua Semiconductor Co., Ltd. All rights reserved. ; * ; * This software component is licensed by XHSC under BSD 3-Clause license ; * (the "License"); You may not use this file except in compliance with the ; * License. You may obtain a copy of the License at: ; * opensource.org/licenses/BSD-3-Clause ; * ; ******************************************************************************/ ;/*****************************************************************************/ ;/* Startup for IAR */ ;/* Version V1.0 */ ;/* Date 2021-12-02 */ ;/* Target-mcu M0+ Device */ ;/*****************************************************************************/ MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table SECTION .intvec:CODE:ROOT(8) DATA __vector_table DCD sfe(CSTACK) ; Top of Stack DCD Reset_Handler ; Reset DCD NMI_Handler ; NMI DCD HardFault_Handler ; Hard Fault DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV DCD SysTick_Handler ; SysTick ; Numbered IRQ handler vectors ; Note: renaming to device dependent ISR function names are done in DCD PORTA_IRQHandler DCD PORTB_IRQHandler DCD PORTC_IRQHandler DCD PORTD_IRQHandler DCD DMAC_IRQHandler DCD TIM3_IRQHandler DCD UART0_IRQHandler DCD UART1_IRQHandler DCD LPUART0_IRQHandler DCD LPUART1_IRQHandler DCD SPI0_IRQHandler DCD SPI1_IRQHandler DCD I2C0_IRQHandler DCD I2C1_IRQHandler DCD TIM0_IRQHandler DCD TIM1_IRQHandler DCD TIM2_IRQHandler DCD LPTIM_IRQHandler DCD TIM4_IRQHandler DCD TIM5_IRQHandler DCD TIM6_IRQHandler DCD PCA_IRQHandler DCD WDT_IRQHandler DCD RTC_IRQHandler DCD ADC_IRQHandler DCD PCNT_IRQHandler DCD VC0_IRQHandler DCD VC1_IRQHandler DCD LVD_IRQHandler DCD LCD_IRQHandler DCD EF_RAM_IRQHandler DCD CLKTRIM_IRQHandler THUMB PUBWEAK Reset_Handler SECTION .text:CODE:NOROOT:REORDER(2) Reset_Handler ;reset NVIC if in rom debug LDR R0, =0x20000000 LDR R2, =0x0 ; vector offset cmp PC, R0 bls ROMCODE ; ram code base address. ADD R2, R0,R2 ROMCODE ; reset Vector table address. LDR R0, =0xE000ED08 STR R2, [R0] LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:NOROOT:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:NOROOT:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:NOROOT:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:NOROOT:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:NOROOT:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK PORTA_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PORTA_IRQHandler B PORTA_IRQHandler PUBWEAK PORTB_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PORTB_IRQHandler B PORTB_IRQHandler PUBWEAK PORTC_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PORTC_IRQHandler B PORTC_IRQHandler PUBWEAK PORTD_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PORTD_IRQHandler B PORTD_IRQHandler PUBWEAK DMAC_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) DMAC_IRQHandler B DMAC_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK UART0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) UART0_IRQHandler B UART0_IRQHandler PUBWEAK UART1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) UART1_IRQHandler B UART1_IRQHandler PUBWEAK LPUART0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) LPUART0_IRQHandler B LPUART0_IRQHandler PUBWEAK LPUART1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) LPUART1_IRQHandler B LPUART1_IRQHandler PUBWEAK SPI0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) SPI0_IRQHandler B SPI0_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK I2C0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) I2C0_IRQHandler B I2C0_IRQHandler PUBWEAK I2C1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) I2C1_IRQHandler B I2C1_IRQHandler PUBWEAK TIM0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM0_IRQHandler B TIM0_IRQHandler PUBWEAK TIM1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM1_IRQHandler B TIM1_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK LPTIM_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) LPTIM_IRQHandler B LPTIM_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK TIM5_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM5_IRQHandler B TIM5_IRQHandler PUBWEAK TIM6_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) TIM6_IRQHandler B TIM6_IRQHandler PUBWEAK PCA_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PCA_IRQHandler B PCA_IRQHandler PUBWEAK WDT_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) WDT_IRQHandler B WDT_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK ADC_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) ADC_IRQHandler B ADC_IRQHandler PUBWEAK PCNT_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) PCNT_IRQHandler B PCNT_IRQHandler PUBWEAK VC0_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) VC0_IRQHandler B VC0_IRQHandler PUBWEAK VC1_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) VC1_IRQHandler B VC1_IRQHandler PUBWEAK LVD_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) LVD_IRQHandler B LVD_IRQHandler PUBWEAK LCD_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) LCD_IRQHandler B LCD_IRQHandler PUBWEAK EF_RAM_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) EF_RAM_IRQHandler B EF_RAM_IRQHandler PUBWEAK CLKTRIM_IRQHandler SECTION .text:CODE:NOROOT:REORDER(1) CLKTRIM_IRQHandler B CLKTRIM_IRQHandler END