MY_CIU32F003.htm 93 KB

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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
  2. <html><head>
  3. <title>Static Call Graph - [.\Objects\MY_CIU32F003.axf]</title></head>
  4. <body><HR>
  5. <H1>Static Call Graph for image .\Objects\MY_CIU32F003.axf</H1><HR>
  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Fri Sep 19 08:54:16 2025
  7. <BR><P>
  8. <H3>Maximum Stack Usage = 668 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
  9. Call chain for Maximum Stack Depth:</H3>
  10. main &rArr; myRadio_process &rArr; RF_GetRecvPayload &rArr; RF_GetRxPayloadLen &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  11. <P>
  12. <H3>
  13. Mutually Recursive functions
  14. </H3> <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
  15. <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
  16. <LI><a href="#[3]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">SVC_Handler</a><BR>
  17. <LI><a href="#[4]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">PendSV_Handler</a><BR>
  18. <LI><a href="#[6]">FLASH_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">FLASH_IRQHandler</a><BR>
  19. </UL>
  20. <P>
  21. <H3>
  22. Function Pointers
  23. </H3><UL>
  24. <LI><a href="#[b]">ADC_COMP_IRQHandler</a> from sn_adc.o(i.ADC_COMP_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  25. <LI><a href="#[8]">EXTI0_1_IRQHandler</a> from sn_exit.o(i.EXTI0_1_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  26. <LI><a href="#[9]">EXTI2_3_IRQHandler</a> from sn_exit.o(i.EXTI2_3_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  27. <LI><a href="#[a]">EXTI4_7_IRQHandler</a> from sn_exit.o(i.EXTI4_7_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  28. <LI><a href="#[6]">FLASH_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  29. <LI><a href="#[2]">HardFault_Handler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  30. <LI><a href="#[10]">I2C1_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  31. <LI><a href="#[f]">LPTIM1_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  32. <LI><a href="#[1]">NMI_Handler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  33. <LI><a href="#[4]">PendSV_Handler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  34. <LI><a href="#[7]">RCC_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  35. <LI><a href="#[1b]">RF_IRQHandler</a> from myradio_gpio.o(i.RF_IRQHandler) referenced from myradio_gpio.o(i.myRadio_gpio_irq_init)
  36. <LI><a href="#[0]">Reset_Handler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  37. <LI><a href="#[17]">SN_SPI_SOF_CS_H</a> from sn_spi.o(i.SN_SPI_SOF_CS_H) referenced from sn_spi.o(i.SN_SPI_IO_SOF_cs)
  38. <LI><a href="#[18]">SN_SPI_SOF_CS_L</a> from sn_spi.o(i.SN_SPI_SOF_CS_L) referenced from sn_spi.o(i.SN_SPI_IO_SOF_cs)
  39. <LI><a href="#[11]">SPI1_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  40. <LI><a href="#[3]">SVC_Handler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  41. <LI><a href="#[5]">SysTick_Handler</a> from sn_ddq.o(i.SysTick_Handler) referenced from startup_ciu32f003.o(RESET)
  42. <LI><a href="#[15]">SystemInit</a> from system_ciu32f003.o(i.SystemInit) referenced from startup_ciu32f003.o(.text)
  43. <LI><a href="#[c]">TIM1_BRK_UP_TRG_COM_IRQHandler</a> from sn_tim1_init.o(i.TIM1_BRK_UP_TRG_COM_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  44. <LI><a href="#[d]">TIM1_CC_IRQHandler</a> from startup_ciu32f003.o(.text) referenced from startup_ciu32f003.o(RESET)
  45. <LI><a href="#[e]">TIM3_IRQHandler</a> from sn_tim3_init.o(i.TIM3_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  46. <LI><a href="#[12]">UART1_IRQHandler</a> from sn_uart.o(i.UART1_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  47. <LI><a href="#[13]">UART2_IRQHandler</a> from sn_uart.o(i.UART2_IRQHandler) referenced from startup_ciu32f003.o(RESET)
  48. <LI><a href="#[16]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_ciu32f003.o(.text)
  49. <LI><a href="#[19]">fputc</a> from sn_uart.o(i.fputc) referenced from printf5.o(i.__0printf$5)
  50. <LI><a href="#[14]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
  51. <LI><a href="#[1d]">myRadio_gpioCadCallback</a> from myradio.o(i.myRadio_gpioCadCallback) referenced from myradio.o(i.myRadio_init)
  52. <LI><a href="#[1c]">myRadio_gpioCallback</a> from myradio.o(i.myRadio_gpioCallback) referenced from myradio.o(i.myRadio_init)
  53. <LI><a href="#[1e]">myRadio_timCallback</a> from myradio.o(i.myRadio_timCallback) referenced from myradio.o(i.myRadio_init)
  54. <LI><a href="#[1a]">rfRx_callback</a> from main.o(i.rfRx_callback) referenced from main.o(i.main)
  55. </UL>
  56. <P>
  57. <H3>
  58. Global Symbols
  59. </H3>
  60. <P><STRONG><a name="[16]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
  61. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(.text)
  62. </UL>
  63. <P><STRONG><a name="[a6]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
  64. <P><STRONG><a name="[1f]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
  65. <BR><BR>[Calls]<UL><LI><a href="#[20]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
  66. </UL>
  67. <P><STRONG><a name="[29]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
  68. <BR><BR>[Called By]<UL><LI><a href="#[20]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
  69. </UL>
  70. <P><STRONG><a name="[a7]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
  71. <P><STRONG><a name="[a8]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
  72. <P><STRONG><a name="[a9]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
  73. <P><STRONG><a name="[aa]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
  74. <P><STRONG><a name="[ab]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
  75. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  76. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  77. </UL>
  78. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  79. <BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
  80. </UL>
  81. <BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
  82. </UL>
  83. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  84. </UL>
  85. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  86. <BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
  87. </UL>
  88. <BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
  89. </UL>
  90. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  91. </UL>
  92. <P><STRONG><a name="[3]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  93. <BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
  94. </UL>
  95. <BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
  96. </UL>
  97. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  98. </UL>
  99. <P><STRONG><a name="[4]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  100. <BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
  101. </UL>
  102. <BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
  103. </UL>
  104. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  105. </UL>
  106. <P><STRONG><a name="[6]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  107. <BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_IRQHandler
  108. </UL>
  109. <BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_IRQHandler
  110. </UL>
  111. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  112. </UL>
  113. <P><STRONG><a name="[10]"></a>I2C1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  114. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  115. </UL>
  116. <P><STRONG><a name="[f]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  117. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  118. </UL>
  119. <P><STRONG><a name="[7]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  120. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  121. </UL>
  122. <P><STRONG><a name="[11]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  123. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  124. </UL>
  125. <P><STRONG><a name="[d]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_ciu32f003.o(.text))
  126. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  127. </UL>
  128. <P><STRONG><a name="[ac]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
  129. <P><STRONG><a name="[22]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text))
  130. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = __aeabi_uidivmod
  131. </UL>
  132. <BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayus
  133. <LI><a href="#[2c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_adc_calc_vref_voltage
  134. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_get_pin_mode
  135. <LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetFreq
  136. <LI><a href="#[21]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_idivmod
  137. </UL>
  138. <P><STRONG><a name="[ad]"></a>__aeabi_idiv</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, idiv.o(.text), UNUSED)
  139. <P><STRONG><a name="[21]"></a>__aeabi_idivmod</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, idiv.o(.text))
  140. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = __aeabi_idivmod &rArr; __aeabi_uidivmod
  141. </UL>
  142. <BR>[Calls]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
  143. </UL>
  144. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  145. </UL>
  146. <P><STRONG><a name="[95]"></a>rand</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, rand.o(.text))
  147. <BR><BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  148. </UL>
  149. <P><STRONG><a name="[ae]"></a>srand</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, rand.o(.text), UNUSED)
  150. <P><STRONG><a name="[af]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
  151. <P><STRONG><a name="[9e]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))
  152. <BR><BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  153. </UL>
  154. <P><STRONG><a name="[b0]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
  155. <P><STRONG><a name="[24]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
  156. <BR><BR>[Called By]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
  157. <LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
  158. </UL>
  159. <P><STRONG><a name="[b1]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
  160. <P><STRONG><a name="[b2]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
  161. <P><STRONG><a name="[23]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
  162. <BR><BR>[Calls]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
  163. </UL>
  164. <P><STRONG><a name="[73]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
  165. <BR><BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_TIM1_CALL_set
  166. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_init
  167. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  168. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_MASTER_init
  169. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_set
  170. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_SOF_cs
  171. </UL>
  172. <P><STRONG><a name="[b3]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
  173. <P><STRONG><a name="[25]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
  174. <BR><BR>[Calls]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
  175. </UL>
  176. <P><STRONG><a name="[26]"></a>__aeabi_uldivmod</STRONG> (Thumb, 96 bytes, Stack size 48 bytes, uldiv.o(.text), UNUSED)
  177. <BR><BR>[Calls]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
  178. <LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
  179. </UL>
  180. <BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
  181. </UL>
  182. <P><STRONG><a name="[20]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
  183. <BR><BR>[Calls]<UL><LI><a href="#[29]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
  184. </UL>
  185. <BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
  186. </UL>
  187. <P><STRONG><a name="[b4]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
  188. <P><STRONG><a name="[28]"></a>__aeabi_llsl</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, llshl.o(.text), UNUSED)
  189. <BR><BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
  190. </UL>
  191. <P><STRONG><a name="[b5]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, llshl.o(.text), UNUSED)
  192. <P><STRONG><a name="[27]"></a>__aeabi_llsr</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, llushr.o(.text), UNUSED)
  193. <BR><BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
  194. </UL>
  195. <P><STRONG><a name="[b6]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, llushr.o(.text), UNUSED)
  196. <P><STRONG><a name="[b]"></a>ADC_COMP_IRQHandler</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, sn_adc.o(i.ADC_COMP_IRQHandler))
  197. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = ADC_COMP_IRQHandler &rArr; std_adc_calc_vref_voltage &rArr; __aeabi_uidivmod
  198. </UL>
  199. <BR>[Calls]<UL><LI><a href="#[2a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_adc_get_flag
  200. <LI><a href="#[2b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_adc_clear_flag
  201. <LI><a href="#[2c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_adc_calc_vref_voltage
  202. </UL>
  203. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  204. </UL>
  205. <P><STRONG><a name="[2d]"></a>BOARD_SPI_NSS_H</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, myradio_gpio.o(i.BOARD_SPI_NSS_H))
  206. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = BOARD_SPI_NSS_H &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  207. </UL>
  208. <BR>[Calls]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_write
  209. <LI><a href="#[2e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_spi_set_nss_output
  210. </UL>
  211. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  212. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteRegs
  213. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  214. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadRegs
  215. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  216. </UL>
  217. <P><STRONG><a name="[30]"></a>BOARD_SPI_NSS_L</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, myradio_gpio.o(i.BOARD_SPI_NSS_L))
  218. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  219. </UL>
  220. <BR>[Calls]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_write
  221. <LI><a href="#[2e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_spi_set_nss_output
  222. </UL>
  223. <BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteRegs
  224. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  225. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadRegs
  226. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  227. </UL>
  228. <P><STRONG><a name="[8]"></a>EXTI0_1_IRQHandler</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, sn_exit.o(i.EXTI0_1_IRQHandler))
  229. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = EXTI0_1_IRQHandler
  230. </UL>
  231. <BR>[Calls]<UL><LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_get_pending_status
  232. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_clear_pending
  233. </UL>
  234. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  235. </UL>
  236. <P><STRONG><a name="[9]"></a>EXTI2_3_IRQHandler</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, sn_exit.o(i.EXTI2_3_IRQHandler))
  237. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = EXTI2_3_IRQHandler
  238. </UL>
  239. <BR>[Calls]<UL><LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_get_pending_status
  240. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_clear_pending
  241. </UL>
  242. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  243. </UL>
  244. <P><STRONG><a name="[a]"></a>EXTI4_7_IRQHandler</STRONG> (Thumb, 104 bytes, Stack size 8 bytes, sn_exit.o(i.EXTI4_7_IRQHandler))
  245. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = EXTI4_7_IRQHandler
  246. </UL>
  247. <BR>[Calls]<UL><LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_get_pending_status
  248. <LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_clear_pending
  249. </UL>
  250. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  251. </UL>
  252. <P><STRONG><a name="[33]"></a>READ_RF_PAN3029_IRQ</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, myradio_gpio.o(i.READ_RF_PAN3029_IRQ))
  253. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = READ_RF_PAN3029_IRQ &rArr; SN_GPIO_PIN_get &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  254. </UL>
  255. <BR>[Calls]<UL><LI><a href="#[34]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_get
  256. </UL>
  257. <BR>[Called By]<UL><LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_IRQHandler
  258. </UL>
  259. <P><STRONG><a name="[35]"></a>RF_Calibrate</STRONG> (Thumb, 136 bytes, Stack size 16 bytes, pan_rf.o(i.RF_Calibrate))
  260. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = RF_Calibrate &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  261. </UL>
  262. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  263. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  264. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  265. <LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadInfoByte
  266. </UL>
  267. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  268. </UL>
  269. <P><STRONG><a name="[3a]"></a>RF_ClrIRQFlag</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, pan_rf.o(i.RF_ClrIRQFlag))
  270. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_ClrIRQFlag &rArr; RF_WritePageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  271. </UL>
  272. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  273. </UL>
  274. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  275. </UL>
  276. <P><STRONG><a name="[3b]"></a>RF_ConfigAgc</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, pan_rf.o(i.RF_ConfigAgc))
  277. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_ConfigAgc &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  278. </UL>
  279. <BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  280. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  281. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  282. </UL>
  283. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  284. </UL>
  285. <P><STRONG><a name="[3d]"></a>RF_ConfigDefaultParams</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, pan_rf.o(i.RF_ConfigDefaultParams))
  286. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_ConfigDefaultParams &rArr; RF_WritePageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  287. </UL>
  288. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  289. </UL>
  290. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  291. </UL>
  292. <P><STRONG><a name="[3e]"></a>RF_ConfigGpio</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, pan_rf.o(i.RF_ConfigGpio))
  293. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = RF_ConfigGpio &rArr; RF_SetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  294. </UL>
  295. <BR>[Calls]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  296. </UL>
  297. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  298. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_InitAntGpio
  299. </UL>
  300. <P><STRONG><a name="[3f]"></a>RF_ConfigUserParams</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, pan_rf.o(i.RF_ConfigUserParams))
  301. <BR><BR>[Stack]<UL><LI>Max Depth = 164<LI>Call Chain = RF_ConfigUserParams &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  302. </UL>
  303. <BR>[Calls]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPreamLen
  304. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  305. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetSF
  306. <LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetFreq
  307. <LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetCR
  308. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetBW
  309. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRegulatorMode
  310. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetLDR
  311. <LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetInvertIQ
  312. <LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetChipMode
  313. <LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetCRC
  314. </UL>
  315. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  316. </UL>
  317. <P><STRONG><a name="[4b]"></a>RF_DelayMs</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, pan_rf.o(i.RF_DelayMs))
  318. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = RF_DelayMs &rArr; RF_DelayUs &rArr; std_delayus &rArr; __aeabi_uidivmod
  319. </UL>
  320. <BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayUs
  321. </UL>
  322. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  323. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  324. </UL>
  325. <P><STRONG><a name="[4c]"></a>RF_DelayUs</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, pan_rf.o(i.RF_DelayUs))
  326. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = RF_DelayUs &rArr; std_delayus &rArr; __aeabi_uidivmod
  327. </UL>
  328. <BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayus
  329. </UL>
  330. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  331. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  332. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayMs
  333. </UL>
  334. <P><STRONG><a name="[4e]"></a>RF_EnterContinousRxState</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, pan_rf.o(i.RF_EnterContinousRxState))
  335. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = RF_EnterContinousRxState &rArr; RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  336. </UL>
  337. <BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnoffLdoPA
  338. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonRxAnt
  339. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRxMode
  340. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  341. </UL>
  342. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  343. </UL>
  344. <P><STRONG><a name="[53]"></a>RF_EnterSingleRxWithTimeout</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, pan_rf.o(i.RF_EnterSingleRxWithTimeout))
  345. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = RF_EnterSingleRxWithTimeout &rArr; RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  346. </UL>
  347. <BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnoffLdoPA
  348. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonRxAnt
  349. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRxTimeout
  350. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRxMode
  351. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  352. </UL>
  353. <BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  354. </UL>
  355. <P><STRONG><a name="[55]"></a>RF_EnterStandbyState</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, pan_rf.o(i.RF_EnterStandbyState))
  356. <BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = RF_EnterStandbyState &rArr; RF_SetRfState &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  357. </UL>
  358. <BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  359. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetOperateState
  360. </UL>
  361. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  362. </UL>
  363. <P><STRONG><a name="[57]"></a>RF_ExitSleepState</STRONG> (Thumb, 98 bytes, Stack size 8 bytes, pan_rf.o(i.RF_ExitSleepState))
  364. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_ExitSleepState &rArr; RF_SetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  365. </UL>
  366. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  367. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  368. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  369. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayUs
  370. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayMs
  371. </UL>
  372. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  373. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  374. </UL>
  375. <P><STRONG><a name="[59]"></a>RF_GetIRQFlag</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, pan_rf.o(i.RF_GetIRQFlag))
  376. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_GetIRQFlag &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  377. </UL>
  378. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  379. </UL>
  380. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  381. </UL>
  382. <P><STRONG><a name="[a0]"></a>RF_GetOperateState</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, pan_rf.o(i.RF_GetOperateState))
  383. <BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  384. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  385. </UL>
  386. <P><STRONG><a name="[5b]"></a>RF_GetPktRssi</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, pan_rf.o(i.RF_GetPktRssi))
  387. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_GetPktRssi &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  388. </UL>
  389. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  390. </UL>
  391. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  392. </UL>
  393. <P><STRONG><a name="[5c]"></a>RF_GetRecvPayload</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, pan_rf.o(i.RF_GetRecvPayload))
  394. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = RF_GetRecvPayload &rArr; RF_GetRxPayloadLen &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  395. </UL>
  396. <BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadRegs
  397. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetRxPayloadLen
  398. </UL>
  399. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  400. </UL>
  401. <P><STRONG><a name="[5d]"></a>RF_GetRxPayloadLen</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, pan_rf.o(i.RF_GetRxPayloadLen))
  402. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_GetRxPayloadLen &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  403. </UL>
  404. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  405. </UL>
  406. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetRecvPayload
  407. </UL>
  408. <P><STRONG><a name="[1b]"></a>RF_IRQHandler</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, myradio_gpio.o(i.RF_IRQHandler))
  409. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = RF_IRQHandler &rArr; READ_RF_PAN3029_IRQ &rArr; SN_GPIO_PIN_get &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  410. </UL>
  411. <BR>[Calls]<UL><LI><a href="#[33]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;READ_RF_PAN3029_IRQ
  412. </UL>
  413. <BR>[Address Reference Count : 1]<UL><LI> myradio_gpio.o(i.myRadio_gpio_irq_init)
  414. </UL>
  415. <P><STRONG><a name="[5f]"></a>RF_Init</STRONG> (Thumb, 180 bytes, Stack size 8 bytes, pan_rf.o(i.RF_Init))
  416. <BR><BR>[Stack]<UL><LI>Max Depth = 156<LI>Call Chain = RF_Init &rArr; RF_Calibrate &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  417. </UL>
  418. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  419. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  420. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  421. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_InitAntGpio
  422. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayUs
  423. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayMs
  424. <LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigDefaultParams
  425. <LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigAgc
  426. <LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Calibrate
  427. </UL>
  428. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  429. </UL>
  430. <P><STRONG><a name="[61]"></a>RF_InitAntGpio</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, pan_rf.o(i.RF_InitAntGpio))
  431. <BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = RF_InitAntGpio &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  432. </UL>
  433. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteGpioLevel
  434. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigGpio
  435. </UL>
  436. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  437. </UL>
  438. <P><STRONG><a name="[9c]"></a>RF_PAN3029_NRST_H</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, myradio_gpio.o(i.RF_PAN3029_NRST_H))
  439. <BR><BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  440. </UL>
  441. <P><STRONG><a name="[37]"></a>RF_ReadInfoByte</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, pan_rf.o(i.RF_ReadInfoByte))
  442. <BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  443. </UL>
  444. <BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  445. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  446. </UL>
  447. <BR>[Called By]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  448. <LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Calibrate
  449. </UL>
  450. <P><STRONG><a name="[5a]"></a>RF_ReadPageReg</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, pan_rf.o(i.RF_ReadPageReg))
  451. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  452. </UL>
  453. <BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  454. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  455. </UL>
  456. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetPktRssi
  457. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetIRQFlag
  458. <LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadInfoByte
  459. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetRxPayloadLen
  460. </UL>
  461. <P><STRONG><a name="[63]"></a>RF_ReadReg</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, pan_rf.o(i.RF_ReadReg))
  462. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = RF_ReadReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  463. </UL>
  464. <BR>[Calls]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  465. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  466. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WriteByte
  467. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadByte
  468. </UL>
  469. <BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  470. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  471. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  472. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetLogic
  473. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  474. </UL>
  475. <P><STRONG><a name="[5e]"></a>RF_ReadRegs</STRONG> (Thumb, 48 bytes, Stack size 24 bytes, pan_rf.o(i.RF_ReadRegs))
  476. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = RF_ReadRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  477. </UL>
  478. <BR>[Calls]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  479. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  480. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WriteByte
  481. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadByte
  482. </UL>
  483. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetRecvPayload
  484. </UL>
  485. <P><STRONG><a name="[66]"></a>RF_ResetLogic</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, pan_rf.o(i.RF_ResetLogic))
  486. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = RF_ResetLogic &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  487. </UL>
  488. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  489. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  490. </UL>
  491. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StopCad
  492. </UL>
  493. <P><STRONG><a name="[36]"></a>RF_ResetPageRegBits</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, pan_rf.o(i.RF_ResetPageRegBits))
  494. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_ResetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  495. </UL>
  496. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  497. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  498. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  499. </UL>
  500. <BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnoffLdoPA
  501. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  502. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  503. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetBW
  504. <LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigAgc
  505. <LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Calibrate
  506. </UL>
  507. <P><STRONG><a name="[42]"></a>RF_SetBW</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetBW))
  508. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetBW &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  509. </UL>
  510. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  511. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  512. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  513. </UL>
  514. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  515. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setRfParams
  516. </UL>
  517. <P><STRONG><a name="[44]"></a>RF_SetCR</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetCR))
  518. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetCR &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  519. </UL>
  520. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  521. </UL>
  522. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  523. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setRfParams
  524. </UL>
  525. <P><STRONG><a name="[45]"></a>RF_SetCRC</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetCRC))
  526. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetCRC &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  527. </UL>
  528. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  529. </UL>
  530. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  531. </UL>
  532. <P><STRONG><a name="[4a]"></a>RF_SetChipMode</STRONG> (Thumb, 136 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetChipMode))
  533. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetChipMode &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  534. </UL>
  535. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  536. </UL>
  537. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  538. </UL>
  539. <P><STRONG><a name="[41]"></a>RF_SetFreq</STRONG> (Thumb, 262 bytes, Stack size 48 bytes, pan_rf.o(i.RF_SetFreq))
  540. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = RF_SetFreq &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  541. </UL>
  542. <BR>[Calls]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
  543. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  544. <LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  545. </UL>
  546. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  547. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setFrequency
  548. </UL>
  549. <P><STRONG><a name="[48]"></a>RF_SetInvertIQ</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetInvertIQ))
  550. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetInvertIQ &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  551. </UL>
  552. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  553. </UL>
  554. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  555. </UL>
  556. <P><STRONG><a name="[46]"></a>RF_SetLDR</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetLDR))
  557. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetLDR &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  558. </UL>
  559. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  560. </UL>
  561. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  562. </UL>
  563. <P><STRONG><a name="[56]"></a>RF_SetOperateState</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, pan_rf.o(i.RF_SetOperateState))
  564. <BR><BR>[Called By]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterStandbyState
  565. </UL>
  566. <P><STRONG><a name="[60]"></a>RF_SetPage</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetPage))
  567. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  568. </UL>
  569. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  570. </UL>
  571. <BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  572. <LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  573. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  574. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  575. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  576. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  577. <LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadPageReg
  578. </UL>
  579. <P><STRONG><a name="[39]"></a>RF_SetPageRegBits</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, pan_rf.o(i.RF_SetPageRegBits))
  580. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_SetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  581. </UL>
  582. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  583. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  584. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  585. </UL>
  586. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StopCad
  587. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  588. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetBW
  589. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  590. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonLdoPA
  591. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigGpio
  592. <LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Calibrate
  593. </UL>
  594. <P><STRONG><a name="[47]"></a>RF_SetPreamLen</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, pan_rf.o(i.RF_SetPreamLen))
  595. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = RF_SetPreamLen &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  596. </UL>
  597. <BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  598. </UL>
  599. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  600. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  601. </UL>
  602. <P><STRONG><a name="[49]"></a>RF_SetRegulatorMode</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetRegulatorMode))
  603. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_SetRegulatorMode &rArr; RF_WritePageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  604. </UL>
  605. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  606. </UL>
  607. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  608. </UL>
  609. <P><STRONG><a name="[4f]"></a>RF_SetRfState</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetRfState))
  610. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = RF_SetRfState &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  611. </UL>
  612. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  613. </UL>
  614. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  615. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StopCad
  616. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterStandbyState
  617. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  618. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterContinousRxState
  619. </UL>
  620. <P><STRONG><a name="[52]"></a>RF_SetRxMode</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetRxMode))
  621. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetRxMode &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  622. </UL>
  623. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  624. </UL>
  625. <BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  626. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterContinousRxState
  627. </UL>
  628. <P><STRONG><a name="[54]"></a>RF_SetRxTimeout</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, pan_rf.o(i.RF_SetRxTimeout))
  629. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = RF_SetRxTimeout &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  630. </UL>
  631. <BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  632. </UL>
  633. <BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  634. </UL>
  635. <P><STRONG><a name="[43]"></a>RF_SetSF</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetSF))
  636. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetSF &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  637. </UL>
  638. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  639. </UL>
  640. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  641. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setRfParams
  642. </UL>
  643. <P><STRONG><a name="[68]"></a>RF_SetTx</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, pan_rf.o(i.RF_SetTx))
  644. <BR><BR>[Stack]<UL><LI>Max Depth = 180<LI>Call Chain = RF_SetTx &rArr; RF_TxSinglePkt &rArr; RF_TurnonPA &rArr; RF_TurnonTxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  645. </UL>
  646. <BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  647. </UL>
  648. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  649. </UL>
  650. <P><STRONG><a name="[6a]"></a>RF_SetTxMode</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, pan_rf.o(i.RF_SetTxMode))
  651. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = RF_SetTxMode &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  652. </UL>
  653. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  654. </UL>
  655. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  656. </UL>
  657. <P><STRONG><a name="[40]"></a>RF_SetTxPower</STRONG> (Thumb, 242 bytes, Stack size 24 bytes, pan_rf.o(i.RF_SetTxPower))
  658. <BR><BR>[Stack]<UL><LI>Max Depth = 156<LI>Call Chain = RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  659. </UL>
  660. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  661. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  662. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  663. <LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadInfoByte
  664. </UL>
  665. <BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  666. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setTxPower
  667. </UL>
  668. <P><STRONG><a name="[6b]"></a>RF_StartCad</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, pan_rf.o(i.RF_StartCad))
  669. <BR><BR>[Stack]<UL><LI>Max Depth = 164<LI>Call Chain = RF_StartCad &rArr; RF_EnterContinousRxState &rArr; RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  670. </UL>
  671. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  672. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  673. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  674. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterContinousRxState
  675. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigGpio
  676. </UL>
  677. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_restartCadReceiver
  678. </UL>
  679. <P><STRONG><a name="[6c]"></a>RF_StopCad</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, pan_rf.o(i.RF_StopCad))
  680. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_StopCad &rArr; RF_SetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  681. </UL>
  682. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  683. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  684. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  685. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetLogic
  686. </UL>
  687. <BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_timCallback
  688. </UL>
  689. <P><STRONG><a name="[51]"></a>RF_TurnoffLdoPA</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, pan_rf.o(i.RF_TurnoffLdoPA))
  690. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_TurnoffLdoPA &rArr; RF_ResetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  691. </UL>
  692. <BR>[Calls]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  693. </UL>
  694. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  695. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  696. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterContinousRxState
  697. </UL>
  698. <P><STRONG><a name="[6d]"></a>RF_TurnonLdoPA</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, pan_rf.o(i.RF_TurnonLdoPA))
  699. <BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = RF_TurnonLdoPA &rArr; RF_SetPageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  700. </UL>
  701. <BR>[Calls]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  702. </UL>
  703. <BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonPA
  704. </UL>
  705. <P><STRONG><a name="[6e]"></a>RF_TurnonPA</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, pan_rf.o(i.RF_TurnonPA))
  706. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = RF_TurnonPA &rArr; RF_TurnonTxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  707. </UL>
  708. <BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  709. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonTxAnt
  710. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonLdoPA
  711. </UL>
  712. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  713. </UL>
  714. <P><STRONG><a name="[50]"></a>RF_TurnonRxAnt</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, pan_rf.o(i.RF_TurnonRxAnt))
  715. <BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  716. </UL>
  717. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteGpioLevel
  718. </UL>
  719. <BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  720. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterContinousRxState
  721. </UL>
  722. <P><STRONG><a name="[6f]"></a>RF_TurnonTxAnt</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, pan_rf.o(i.RF_TurnonTxAnt))
  723. <BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = RF_TurnonTxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  724. </UL>
  725. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteGpioLevel
  726. </UL>
  727. <BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonPA
  728. </UL>
  729. <P><STRONG><a name="[69]"></a>RF_TxSinglePkt</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, pan_rf.o(i.RF_TxSinglePkt))
  730. <BR><BR>[Stack]<UL><LI>Max Depth = 164<LI>Call Chain = RF_TxSinglePkt &rArr; RF_TurnonPA &rArr; RF_TurnonTxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  731. </UL>
  732. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteRegs
  733. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  734. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  735. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonPA
  736. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxMode
  737. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  738. </UL>
  739. <BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTx
  740. </UL>
  741. <P><STRONG><a name="[62]"></a>RF_WriteGpioLevel</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, pan_rf.o(i.RF_WriteGpioLevel))
  742. <BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  743. </UL>
  744. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  745. </UL>
  746. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonTxAnt
  747. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonRxAnt
  748. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_InitAntGpio
  749. </UL>
  750. <P><STRONG><a name="[38]"></a>RF_WritePageReg</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, pan_rf.o(i.RF_WritePageReg))
  751. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = RF_WritePageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  752. </UL>
  753. <BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  754. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  755. </UL>
  756. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  757. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StopCad
  758. <LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  759. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  760. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  761. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  762. <LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ClrIRQFlag
  763. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnonPA
  764. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRegulatorMode
  765. <LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigDefaultParams
  766. <LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigAgc
  767. <LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Calibrate
  768. </UL>
  769. <P><STRONG><a name="[67]"></a>RF_WritePageRegBits</STRONG> (Thumb, 66 bytes, Stack size 40 bytes, pan_rf.o(i.RF_WritePageRegBits))
  770. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  771. </UL>
  772. <BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ctz
  773. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  774. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  775. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  776. </UL>
  777. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  778. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetSF
  779. <LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetCR
  780. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetBW
  781. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteGpioLevel
  782. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxMode
  783. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRxMode
  784. <LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetLDR
  785. <LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetInvertIQ
  786. <LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetChipMode
  787. <LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetCRC
  788. </UL>
  789. <P><STRONG><a name="[3c]"></a>RF_WritePageRegs</STRONG> (Thumb, 28 bytes, Stack size 24 bytes, pan_rf.o(i.RF_WritePageRegs))
  790. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  791. </UL>
  792. <BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteRegs
  793. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  794. </UL>
  795. <BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPreamLen
  796. <LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetFreq
  797. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRxTimeout
  798. <LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadInfoByte
  799. <LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigAgc
  800. </UL>
  801. <P><STRONG><a name="[58]"></a>RF_WriteReg</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, pan_rf.o(i.RF_WriteReg))
  802. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  803. </UL>
  804. <BR>[Calls]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  805. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  806. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WriteByte
  807. </UL>
  808. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  809. <LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetFreq
  810. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  811. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  812. <LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  813. <LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageReg
  814. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetRfState
  815. <LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPageRegBits
  816. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPage
  817. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetPageRegBits
  818. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ResetLogic
  819. </UL>
  820. <P><STRONG><a name="[70]"></a>RF_WriteRegs</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, pan_rf.o(i.RF_WriteRegs))
  821. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  822. </UL>
  823. <BR>[Calls]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  824. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  825. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WriteByte
  826. </UL>
  827. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TxSinglePkt
  828. <LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegs
  829. </UL>
  830. <P><STRONG><a name="[72]"></a>SN_EXIT_set</STRONG> (Thumb, 308 bytes, Stack size 80 bytes, sn_exit.o(i.SN_EXIT_set))
  831. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = SN_EXIT_set &rArr; std_gpio_init
  832. </UL>
  833. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_init
  834. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_exti_init
  835. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_common_switch8
  836. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_gpio_clk_enable
  837. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
  838. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
  839. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  840. </UL>
  841. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  842. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_irq_init
  843. </UL>
  844. <P><STRONG><a name="[34]"></a>SN_GPIO_PIN_get</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, sn_gpio.o(i.SN_GPIO_PIN_get))
  845. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = SN_GPIO_PIN_get &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  846. </UL>
  847. <BR>[Calls]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_get_pin_mode
  848. </UL>
  849. <BR>[Called By]<UL><LI><a href="#[33]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;READ_RF_PAN3029_IRQ
  850. <LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpioCadCallback
  851. </UL>
  852. <P><STRONG><a name="[7b]"></a>SN_GPIO_PIN_init</STRONG> (Thumb, 94 bytes, Stack size 40 bytes, sn_gpio.o(i.SN_GPIO_PIN_init))
  853. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = SN_GPIO_PIN_init &rArr; std_gpio_init
  854. </UL>
  855. <BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_gpio_clk_enable
  856. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_init
  857. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  858. </UL>
  859. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  860. </UL>
  861. <P><STRONG><a name="[2f]"></a>SN_GPIO_PIN_write</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, sn_gpio.o(i.SN_GPIO_PIN_write))
  862. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  863. </UL>
  864. <BR>[Calls]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_get_pin_mode
  865. </UL>
  866. <BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  867. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  868. </UL>
  869. <P><STRONG><a name="[7d]"></a>SN_SPI_IO_SOF_cs</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, sn_spi.o(i.SN_SPI_IO_SOF_cs))
  870. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = SN_SPI_IO_SOF_cs &rArr; std_gpio_init
  871. </UL>
  872. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_init
  873. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_gpio_clk_enable
  874. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_set_pin
  875. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  876. </UL>
  877. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  878. </UL>
  879. <P><STRONG><a name="[80]"></a>SN_SPI_IO_set</STRONG> (Thumb, 362 bytes, Stack size 72 bytes, sn_spi.o(i.SN_SPI_IO_set))
  880. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = SN_SPI_IO_set &rArr; std_gpio_init
  881. </UL>
  882. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_init
  883. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_gpio_clk_enable
  884. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  885. </UL>
  886. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  887. </UL>
  888. <P><STRONG><a name="[81]"></a>SN_SPI_MASTER_init</STRONG> (Thumb, 168 bytes, Stack size 48 bytes, sn_spi.o(i.SN_SPI_MASTER_init))
  889. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = SN_SPI_MASTER_init
  890. </UL>
  891. <BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_spi_init
  892. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  893. </UL>
  894. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  895. </UL>
  896. <P><STRONG><a name="[83]"></a>SN_SYSCLK_set</STRONG> (Thumb, 250 bytes, Stack size 8 bytes, sn_rcc.o(i.SN_SYSCLK_set))
  897. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SN_SYSCLK_set
  898. </UL>
  899. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_set_sysclk_source
  900. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_rcc_get_sysclk_source
  901. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_flash_set_latency
  902. </UL>
  903. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  904. </UL>
  905. <P><STRONG><a name="[87]"></a>SN_TIM1_CALL_set</STRONG> (Thumb, 202 bytes, Stack size 40 bytes, sn_tim1_init.o(i.SN_TIM1_CALL_set))
  906. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = SN_TIM1_CALL_set &rArr; __NVIC_SetPriority
  907. </UL>
  908. <BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_tim_clear_flag
  909. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
  910. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_tim_init
  911. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
  912. </UL>
  913. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  914. </UL>
  915. <P><STRONG><a name="[65]"></a>SPI_ReadByte</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, pan_rf.o(i.SPI_ReadByte))
  916. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_ReadByte &rArr; myRadioSpi_rwByte
  917. </UL>
  918. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadioSpi_rwByte
  919. </UL>
  920. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadRegs
  921. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  922. </UL>
  923. <P><STRONG><a name="[64]"></a>SPI_WriteByte</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, pan_rf.o(i.SPI_WriteByte))
  924. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_WriteByte &rArr; myRadioSpi_rwByte
  925. </UL>
  926. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadioSpi_rwByte
  927. </UL>
  928. <BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteRegs
  929. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WriteReg
  930. <LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadRegs
  931. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ReadReg
  932. </UL>
  933. <P><STRONG><a name="[5]"></a>SysTick_Handler</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, sn_ddq.o(i.SysTick_Handler))
  934. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  935. </UL>
  936. <P><STRONG><a name="[15]"></a>SystemInit</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, system_ciu32f003.o(i.SystemInit))
  937. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(.text)
  938. </UL>
  939. <P><STRONG><a name="[c]"></a>TIM1_BRK_UP_TRG_COM_IRQHandler</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, sn_tim1_init.o(i.TIM1_BRK_UP_TRG_COM_IRQHandler))
  940. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM1_BRK_UP_TRG_COM_IRQHandler
  941. </UL>
  942. <BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_tim_clear_flag
  943. </UL>
  944. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  945. </UL>
  946. <P><STRONG><a name="[e]"></a>TIM3_IRQHandler</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, sn_tim3_init.o(i.TIM3_IRQHandler))
  947. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM3_IRQHandler
  948. </UL>
  949. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  950. </UL>
  951. <P><STRONG><a name="[12]"></a>UART1_IRQHandler</STRONG> (Thumb, 122 bytes, Stack size 8 bytes, sn_uart.o(i.UART1_IRQHandler))
  952. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART1_IRQHandler
  953. </UL>
  954. <BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_get_flag
  955. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_get_cr1_interrupt_enable
  956. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_clear_flag
  957. </UL>
  958. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  959. </UL>
  960. <P><STRONG><a name="[13]"></a>UART2_IRQHandler</STRONG> (Thumb, 122 bytes, Stack size 8 bytes, sn_uart.o(i.UART2_IRQHandler))
  961. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART2_IRQHandler
  962. </UL>
  963. <BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_get_flag
  964. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_get_cr1_interrupt_enable
  965. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_clear_flag
  966. </UL>
  967. <BR>[Address Reference Count : 1]<UL><LI> startup_ciu32f003.o(RESET)
  968. </UL>
  969. <P><STRONG><a name="[8f]"></a>__0printf$5</STRONG> (Thumb, 24 bytes, Stack size 24 bytes, printf5.o(i.__0printf$5), UNUSED)
  970. <BR><BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
  971. </UL>
  972. <P><STRONG><a name="[b7]"></a>__1printf$5</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf5.o(i.__0printf$5), UNUSED)
  973. <P><STRONG><a name="[9a]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf5.o(i.__0printf$5))
  974. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2printf
  975. </UL>
  976. <BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  977. <LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_timCallback
  978. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_restartCadReceiver
  979. <LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpioCadCallback
  980. </UL>
  981. <P><STRONG><a name="[76]"></a>__ARM_common_switch8</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, sn_exit.o(i.__ARM_common_switch8))
  982. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __ARM_common_switch8
  983. </UL>
  984. <BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  985. </UL>
  986. <P><STRONG><a name="[71]"></a>__ctz</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, pan_rf.o(i.__ctz))
  987. <BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_WritePageRegBits
  988. </UL>
  989. <P><STRONG><a name="[b8]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
  990. <P><STRONG><a name="[b9]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
  991. <P><STRONG><a name="[ba]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
  992. <P><STRONG><a name="[19]"></a>fputc</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, sn_uart.o(i.fputc))
  993. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fputc
  994. </UL>
  995. <BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_tx_write_data
  996. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_uart_get_flag
  997. </UL>
  998. <BR>[Address Reference Count : 1]<UL><LI> printf5.o(i.__0printf$5)
  999. </UL>
  1000. <P><STRONG><a name="[a5]"></a>getRfPowerTabIndex</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, myradio.o(i.getRfPowerTabIndex))
  1001. <BR><BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setTxPower
  1002. </UL>
  1003. <P><STRONG><a name="[14]"></a>main</STRONG> (Thumb, 86 bytes, Stack size 0 bytes, main.o(i.main))
  1004. <BR><BR>[Stack]<UL><LI>Max Depth = 668<LI>Call Chain = main &rArr; myRadio_process &rArr; RF_GetRecvPayload &rArr; RF_GetRxPayloadLen &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1005. </UL>
  1006. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayms
  1007. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delay_init
  1008. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1009. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_process
  1010. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  1011. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SYSCLK_set
  1012. <LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetPreamLen
  1013. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rand
  1014. <LI><a href="#[21]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_idivmod
  1015. </UL>
  1016. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
  1017. </UL>
  1018. <P><STRONG><a name="[8b]"></a>myRadioSpi_rwByte</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, myradio_gpio.o(i.myRadioSpi_rwByte))
  1019. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = myRadioSpi_rwByte
  1020. </UL>
  1021. <BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_spi_get_flag
  1022. </UL>
  1023. <BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WriteByte
  1024. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_ReadByte
  1025. </UL>
  1026. <P><STRONG><a name="[99]"></a>myRadio_delay</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, myradio.o(i.myRadio_delay))
  1027. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = myRadio_delay &rArr; std_delayms &rArr; std_delayus &rArr; __aeabi_uidivmod
  1028. </UL>
  1029. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayms
  1030. </UL>
  1031. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1032. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1033. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  1034. </UL>
  1035. <P><STRONG><a name="[1d]"></a>myRadio_gpioCadCallback</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, myradio.o(i.myRadio_gpioCadCallback))
  1036. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = myRadio_gpioCadCallback &rArr; SN_GPIO_PIN_get &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1037. </UL>
  1038. <BR>[Calls]<UL><LI><a href="#[34]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_get
  1039. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
  1040. </UL>
  1041. <BR>[Address Reference Count : 1]<UL><LI> myradio.o(i.myRadio_init)
  1042. </UL>
  1043. <P><STRONG><a name="[1c]"></a>myRadio_gpioCallback</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, myradio.o(i.myRadio_gpioCallback))
  1044. <BR>[Address Reference Count : 1]<UL><LI> myradio.o(i.myRadio_init)
  1045. </UL>
  1046. <P><STRONG><a name="[9b]"></a>myRadio_gpio_init</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, myradio_gpio.o(i.myRadio_gpio_init))
  1047. <BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = myRadio_gpio_init &rArr; myRadio_gpio_irq_init &rArr; SN_EXIT_set &rArr; std_gpio_init
  1048. </UL>
  1049. <BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_init
  1050. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_MASTER_init
  1051. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_set
  1052. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_SOF_cs
  1053. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_irq_init
  1054. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_PAN3029_NRST_H
  1055. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  1056. </UL>
  1057. <BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  1058. </UL>
  1059. <P><STRONG><a name="[9d]"></a>myRadio_gpio_irq_init</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, myradio_gpio.o(i.myRadio_gpio_irq_init))
  1060. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = myRadio_gpio_irq_init &rArr; SN_EXIT_set &rArr; std_gpio_init
  1061. </UL>
  1062. <BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1063. </UL>
  1064. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  1065. </UL>
  1066. <P><STRONG><a name="[93]"></a>myRadio_init</STRONG> (Thumb, 88 bytes, Stack size 24 bytes, myradio.o(i.myRadio_init))
  1067. <BR><BR>[Stack]<UL><LI>Max Depth = 188<LI>Call Chain = myRadio_init &rArr; RF_ConfigUserParams &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1068. </UL>
  1069. <BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_TIM1_CALL_set
  1070. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1071. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_gpio_init
  1072. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_Init
  1073. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ConfigUserParams
  1074. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_delay
  1075. </UL>
  1076. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1077. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1078. <LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  1079. </UL>
  1080. <P><STRONG><a name="[97]"></a>myRadio_process</STRONG> (Thumb, 332 bytes, Stack size 552 bytes, myradio.o(i.myRadio_process))
  1081. <BR><BR>[Stack]<UL><LI>Max Depth = 668<LI>Call Chain = myRadio_process &rArr; RF_GetRecvPayload &rArr; RF_GetRxPayloadLen &rArr; RF_ReadPageReg &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1082. </UL>
  1083. <BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_TurnoffLdoPA
  1084. <LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetRecvPayload
  1085. <LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetPktRssi
  1086. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetIRQFlag
  1087. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterStandbyState
  1088. <LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ClrIRQFlag
  1089. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
  1090. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
  1091. </UL>
  1092. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  1093. </UL>
  1094. <P><STRONG><a name="[9f]"></a>myRadio_receiver</STRONG> (Thumb, 102 bytes, Stack size 8 bytes, myradio.o(i.myRadio_receiver))
  1095. <BR><BR>[Stack]<UL><LI>Max Depth = 196<LI>Call Chain = myRadio_receiver &rArr; myRadio_init &rArr; RF_ConfigUserParams &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1096. </UL>
  1097. <BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  1098. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetOperateState
  1099. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  1100. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_EnterSingleRxWithTimeout
  1101. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setTxPower
  1102. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setRfParams
  1103. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setFrequency
  1104. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_delay
  1105. </UL>
  1106. <BR>[Called By]<UL><LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rfRx_callback
  1107. </UL>
  1108. <P><STRONG><a name="[a4]"></a>myRadio_restartCadReceiver</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, myradio.o(i.myRadio_restartCadReceiver))
  1109. <BR><BR>[Stack]<UL><LI>Max Depth = 172<LI>Call Chain = myRadio_restartCadReceiver &rArr; RF_StartCad &rArr; RF_EnterContinousRxState &rArr; RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1110. </UL>
  1111. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StartCad
  1112. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
  1113. </UL>
  1114. <BR>[Called By]<UL><LI><a href="#[1e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_timCallback
  1115. </UL>
  1116. <P><STRONG><a name="[a1]"></a>myRadio_setFrequency</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, myradio.o(i.myRadio_setFrequency))
  1117. <BR><BR>[Stack]<UL><LI>Max Depth = 156<LI>Call Chain = myRadio_setFrequency &rArr; RF_SetFreq &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1118. </UL>
  1119. <BR>[Calls]<UL><LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetFreq
  1120. </UL>
  1121. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1122. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1123. </UL>
  1124. <P><STRONG><a name="[a3]"></a>myRadio_setRfParams</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, myradio.o(i.myRadio_setRfParams))
  1125. <BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = myRadio_setRfParams &rArr; RF_SetSF &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1126. </UL>
  1127. <BR>[Calls]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetSF
  1128. <LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetCR
  1129. <LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetBW
  1130. </UL>
  1131. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1132. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1133. </UL>
  1134. <P><STRONG><a name="[a2]"></a>myRadio_setTxPower</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, myradio.o(i.myRadio_setTxPower))
  1135. <BR><BR>[Stack]<UL><LI>Max Depth = 172<LI>Call Chain = myRadio_setTxPower &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1136. </UL>
  1137. <BR>[Calls]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTxPower
  1138. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getRfPowerTabIndex
  1139. </UL>
  1140. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_transmitArray
  1141. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1142. </UL>
  1143. <P><STRONG><a name="[1e]"></a>myRadio_timCallback</STRONG> (Thumb, 128 bytes, Stack size 8 bytes, myradio.o(i.myRadio_timCallback))
  1144. <BR><BR>[Stack]<UL><LI>Max Depth = 180<LI>Call Chain = myRadio_timCallback &rArr; myRadio_restartCadReceiver &rArr; RF_StartCad &rArr; RF_EnterContinousRxState &rArr; RF_TurnonRxAnt &rArr; RF_WriteGpioLevel &rArr; RF_WritePageRegBits &rArr; RF_SetPage &rArr; RF_WriteReg &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1145. </UL>
  1146. <BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_StopCad
  1147. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_restartCadReceiver
  1148. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
  1149. </UL>
  1150. <BR>[Address Reference Count : 1]<UL><LI> myradio.o(i.myRadio_init)
  1151. </UL>
  1152. <P><STRONG><a name="[96]"></a>myRadio_transmitArray</STRONG> (Thumb, 108 bytes, Stack size 16 bytes, myradio.o(i.myRadio_transmitArray))
  1153. <BR><BR>[Stack]<UL><LI>Max Depth = 204<LI>Call Chain = myRadio_transmitArray &rArr; myRadio_init &rArr; RF_ConfigUserParams &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1154. </UL>
  1155. <BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_init
  1156. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_SetTx
  1157. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_GetOperateState
  1158. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_ExitSleepState
  1159. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setTxPower
  1160. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setRfParams
  1161. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_setFrequency
  1162. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_delay
  1163. </UL>
  1164. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  1165. </UL>
  1166. <P><STRONG><a name="[1a]"></a>rfRx_callback</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, main.o(i.rfRx_callback))
  1167. <BR><BR>[Stack]<UL><LI>Max Depth = 204<LI>Call Chain = rfRx_callback &rArr; myRadio_receiver &rArr; myRadio_init &rArr; RF_ConfigUserParams &rArr; RF_SetTxPower &rArr; RF_ReadInfoByte &rArr; RF_WritePageRegs &rArr; RF_WriteRegs &rArr; BOARD_SPI_NSS_L &rArr; SN_GPIO_PIN_write &rArr; std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1168. </UL>
  1169. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_receiver
  1170. </UL>
  1171. <BR>[Address Reference Count : 1]<UL><LI> main.o(i.main)
  1172. </UL>
  1173. <P><STRONG><a name="[92]"></a>std_delay_init</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, ciu32f003_std.o(i.std_delay_init))
  1174. <BR><BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  1175. </UL>
  1176. <P><STRONG><a name="[94]"></a>std_delayms</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, ciu32f003_std.o(i.std_delayms))
  1177. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = std_delayms &rArr; std_delayus &rArr; __aeabi_uidivmod
  1178. </UL>
  1179. <BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayus
  1180. </UL>
  1181. <BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
  1182. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadio_delay
  1183. </UL>
  1184. <P><STRONG><a name="[4d]"></a>std_delayus</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, ciu32f003_std.o(i.std_delayus))
  1185. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = std_delayus &rArr; __aeabi_uidivmod
  1186. </UL>
  1187. <BR>[Calls]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
  1188. </UL>
  1189. <BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_delayms
  1190. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RF_DelayUs
  1191. </UL>
  1192. <P><STRONG><a name="[77]"></a>std_exti_init</STRONG> (Thumb, 308 bytes, Stack size 20 bytes, ciu32f003_std_exti.o(i.std_exti_init))
  1193. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = std_exti_init
  1194. </UL>
  1195. <BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1196. </UL>
  1197. <P><STRONG><a name="[75]"></a>std_gpio_init</STRONG> (Thumb, 162 bytes, Stack size 20 bytes, ciu32f003_std_gpio.o(i.std_gpio_init))
  1198. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = std_gpio_init
  1199. </UL>
  1200. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_init
  1201. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1202. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_set
  1203. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_SOF_cs
  1204. </UL>
  1205. <P><STRONG><a name="[82]"></a>std_spi_init</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, ciu32f003_std_spi.o(i.std_spi_init))
  1206. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_MASTER_init
  1207. </UL>
  1208. <P><STRONG><a name="[88]"></a>std_tim_init</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, ciu32f003_std_tim.o(i.std_tim_init))
  1209. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = std_tim_init
  1210. </UL>
  1211. <BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_TIM1_CALL_set
  1212. </UL>
  1213. <P>
  1214. <H3>
  1215. Local Symbols
  1216. </H3>
  1217. <P><STRONG><a name="[7a]"></a>std_gpio_get_pin_mode</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, sn_gpio.o(i.std_gpio_get_pin_mode))
  1218. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = std_gpio_get_pin_mode &rArr; __aeabi_uidivmod
  1219. </UL>
  1220. <BR>[Calls]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
  1221. </UL>
  1222. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_write
  1223. <LI><a href="#[34]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_get
  1224. </UL>
  1225. <P><STRONG><a name="[7c]"></a>std_rcc_gpio_clk_enable</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, sn_gpio.o(i.std_rcc_gpio_clk_enable))
  1226. <BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_GPIO_PIN_init
  1227. </UL>
  1228. <P><STRONG><a name="[2c]"></a>std_adc_calc_vref_voltage</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, sn_adc.o(i.std_adc_calc_vref_voltage))
  1229. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = std_adc_calc_vref_voltage &rArr; __aeabi_uidivmod
  1230. </UL>
  1231. <BR>[Calls]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
  1232. </UL>
  1233. <BR>[Called By]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_COMP_IRQHandler
  1234. </UL>
  1235. <P><STRONG><a name="[2b]"></a>std_adc_clear_flag</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sn_adc.o(i.std_adc_clear_flag))
  1236. <BR><BR>[Called By]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_COMP_IRQHandler
  1237. </UL>
  1238. <P><STRONG><a name="[2a]"></a>std_adc_get_flag</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sn_adc.o(i.std_adc_get_flag))
  1239. <BR><BR>[Called By]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_COMP_IRQHandler
  1240. </UL>
  1241. <P><STRONG><a name="[8a]"></a>__NVIC_SetPriority</STRONG> (Thumb, 110 bytes, Stack size 8 bytes, sn_tim1_init.o(i.__NVIC_SetPriority))
  1242. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
  1243. </UL>
  1244. <BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_TIM1_CALL_set
  1245. </UL>
  1246. <P><STRONG><a name="[89]"></a>std_tim_clear_flag</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sn_tim1_init.o(i.std_tim_clear_flag))
  1247. <BR><BR>[Called By]<UL><LI><a href="#[c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM1_BRK_UP_TRG_COM_IRQHandler
  1248. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_TIM1_CALL_set
  1249. </UL>
  1250. <P><STRONG><a name="[8e]"></a>std_uart_clear_flag</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, sn_uart.o(i.std_uart_clear_flag))
  1251. <BR><BR>[Called By]<UL><LI><a href="#[13]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART2_IRQHandler
  1252. <LI><a href="#[12]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART1_IRQHandler
  1253. </UL>
  1254. <P><STRONG><a name="[8c]"></a>std_uart_get_cr1_interrupt_enable</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sn_uart.o(i.std_uart_get_cr1_interrupt_enable))
  1255. <BR><BR>[Called By]<UL><LI><a href="#[13]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART2_IRQHandler
  1256. <LI><a href="#[12]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART1_IRQHandler
  1257. </UL>
  1258. <P><STRONG><a name="[8d]"></a>std_uart_get_flag</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sn_uart.o(i.std_uart_get_flag))
  1259. <BR><BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
  1260. <LI><a href="#[13]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART2_IRQHandler
  1261. <LI><a href="#[12]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART1_IRQHandler
  1262. </UL>
  1263. <P><STRONG><a name="[91]"></a>std_uart_tx_write_data</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, sn_uart.o(i.std_uart_tx_write_data))
  1264. <BR><BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
  1265. </UL>
  1266. <P><STRONG><a name="[84]"></a>std_flash_set_latency</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, sn_rcc.o(i.std_flash_set_latency))
  1267. <BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SYSCLK_set
  1268. </UL>
  1269. <P><STRONG><a name="[86]"></a>std_rcc_get_sysclk_source</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sn_rcc.o(i.std_rcc_get_sysclk_source))
  1270. <BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SYSCLK_set
  1271. </UL>
  1272. <P><STRONG><a name="[85]"></a>std_rcc_set_sysclk_source</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, sn_rcc.o(i.std_rcc_set_sysclk_source))
  1273. <BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SYSCLK_set
  1274. </UL>
  1275. <P><STRONG><a name="[17]"></a>SN_SPI_SOF_CS_H</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, sn_spi.o(i.SN_SPI_SOF_CS_H))
  1276. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SN_SPI_SOF_CS_H
  1277. </UL>
  1278. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;std_gpio_set_pin
  1279. </UL>
  1280. <BR>[Address Reference Count : 1]<UL><LI> sn_spi.o(i.SN_SPI_IO_SOF_cs)
  1281. </UL>
  1282. <P><STRONG><a name="[18]"></a>SN_SPI_SOF_CS_L</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, sn_spi.o(i.SN_SPI_SOF_CS_L))
  1283. <BR>[Address Reference Count : 1]<UL><LI> sn_spi.o(i.SN_SPI_IO_SOF_cs)
  1284. </UL>
  1285. <P><STRONG><a name="[7f]"></a>std_gpio_set_pin</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, sn_spi.o(i.std_gpio_set_pin))
  1286. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_SOF_cs
  1287. <LI><a href="#[17]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_SOF_CS_H
  1288. </UL>
  1289. <P><STRONG><a name="[7e]"></a>std_rcc_gpio_clk_enable</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, sn_spi.o(i.std_rcc_gpio_clk_enable))
  1290. <BR><BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_set
  1291. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_SPI_IO_SOF_cs
  1292. </UL>
  1293. <P><STRONG><a name="[79]"></a>__NVIC_EnableIRQ</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, sn_exit.o(i.__NVIC_EnableIRQ))
  1294. <BR><BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1295. </UL>
  1296. <P><STRONG><a name="[78]"></a>__NVIC_SetPriority</STRONG> (Thumb, 110 bytes, Stack size 8 bytes, sn_exit.o(i.__NVIC_SetPriority))
  1297. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
  1298. </UL>
  1299. <BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1300. </UL>
  1301. <P><STRONG><a name="[32]"></a>std_exti_clear_pending</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, sn_exit.o(i.std_exti_clear_pending))
  1302. <BR><BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI4_7_IRQHandler
  1303. <LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI2_3_IRQHandler
  1304. <LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_1_IRQHandler
  1305. </UL>
  1306. <P><STRONG><a name="[31]"></a>std_exti_get_pending_status</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, sn_exit.o(i.std_exti_get_pending_status))
  1307. <BR><BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI4_7_IRQHandler
  1308. <LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI2_3_IRQHandler
  1309. <LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_1_IRQHandler
  1310. </UL>
  1311. <P><STRONG><a name="[74]"></a>std_rcc_gpio_clk_enable</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, sn_exit.o(i.std_rcc_gpio_clk_enable))
  1312. <BR><BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SN_EXIT_set
  1313. </UL>
  1314. <P><STRONG><a name="[98]"></a>std_spi_get_flag</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, myradio_gpio.o(i.std_spi_get_flag))
  1315. <BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;myRadioSpi_rwByte
  1316. </UL>
  1317. <P><STRONG><a name="[2e]"></a>std_spi_set_nss_output</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, myradio_gpio.o(i.std_spi_set_nss_output))
  1318. <BR><BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_L
  1319. <LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BOARD_SPI_NSS_H
  1320. </UL>
  1321. <P><STRONG><a name="[90]"></a>_printf_core</STRONG> (Thumb, 688 bytes, Stack size 96 bytes, printf5.o(i._printf_core), UNUSED)
  1322. <BR><BR>[Calls]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
  1323. </UL>
  1324. <BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf$5
  1325. </UL>
  1326. <P>
  1327. <H3>
  1328. Undefined Global Symbols
  1329. </H3><HR></body></html>