timer.lst 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587
  1. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 1
  2. C51 COMPILER V9.60.7.0, COMPILATION OF MODULE TIMER
  3. OBJECT MODULE PLACED IN .\Objects\timer.obj
  4. COMPILER INVOKED BY: d:\Keil_v5\C51\BIN\C51.EXE ..\..\..\..\driver\src\timer.c OBJECTADVANCED OPTIMIZE(9,SPEED) BROWSE O
  5. -RDER NOAREGS MODC2 INCDIR(..\..\..\..\driver\inc;..\..\..\..\mcu;..\..\..\..\middleware\log;..\..\..\..\middleware\delay
  6. -;..\..\..\..\middleware\rf_basis) DEBUG PRINT(.\Listings\timer.lst) TABS(2) OBJECT(.\Objects\timer.obj)
  7. line level source
  8. 1 /**
  9. 2 ************************************************************************
  10. 3 * @file timer.c
  11. 4 * @author Panchip Team
  12. 5 * @version V0.5
  13. 6 * @date 2024-04-28
  14. 7 * @brief This file provides all the timer firmware functions.
  15. 8 * @note
  16. 9 * Copyright (C) 2024 Panchip Technology Corp. All rights reserved.
  17. 10 ****************************************************************************
  18. 11 */
  19. 12
  20. 13 #include "timer.h"
  21. 14
  22. 15 /** @addtogroup PAN262x_Std_Driver
  23. 16 * @{
  24. 17 */
  25. 18
  26. 19 /** @defgroup TIMER
  27. 20 * @brief TIMER driver modules
  28. 21 * @{
  29. 22 */
  30. 23
  31. 24 /** @defgroup TIMER_Private_Functions
  32. 25 * @{
  33. 26 */
  34. 27
  35. 28 /**
  36. 29 * @brief Deinitializes the TIMx peripheral registers to their default reset values.
  37. 30 * @param TIMx: where x can be 0 to 2 to select the TIM peripheral.
  38. 31 * @retval None
  39. 32 */
  40. 33 void TIM_DeInit(TIM_IdTypeDef TIMERx)
  41. 34 {
  42. 35 1 /* Check the parameters */
  43. 36 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  44. 37 1
  45. 38 1 if (TIMERx == TIMER0)
  46. 39 1 {
  47. 40 2 TR0 = 0;
  48. 41 2 TF0 = 0;
  49. 42 2 TL0 = 0;
  50. 43 2 TH0 = 0;
  51. 44 2 TMOD &= ~0x0F;
  52. 45 2 }
  53. 46 1 else if (TIMERx == TIMER1)
  54. 47 1 {
  55. 48 2 TR1 = 0;
  56. 49 2 TF1 = 0;
  57. 50 2 TL1 = 0;
  58. 51 2 TH1 = 0;
  59. 52 2 TMOD &= ~0xF0;
  60. 53 2 }
  61. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 2
  62. 54 1 else if (TIMERx == TIMER2)
  63. 55 1 {
  64. 56 2 T2CON = 0;
  65. 57 2 CCEN = 0;
  66. 58 2 TL2 = 0;
  67. 59 2 TH2 = 0;
  68. 60 2 TCAPCON = 0;
  69. 61 2 TCAPSTA = 0;
  70. 62 2 CRCH = 0;
  71. 63 2 CRCL = 0;
  72. 64 2 CCH1 = 0;
  73. 65 2 CCL1 = 0;
  74. 66 2 CCH2 = 0;
  75. 67 2 CCL2 = 0;
  76. 68 2 CCH3 = 0;
  77. 69 2 CCL3 = 0;
  78. 70 2 }
  79. 71 1 }
  80. 72
  81. 73 /**
  82. 74 * @brief Initializes the TIMERx Time Base Unit peripheral according to
  83. 75 * the specified parameters in the TIM_TimeBaseInitStruct.
  84. 76 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  85. 77 * @param TIM_Mode: specifies the workmode of timer.
  86. 78 * This parameter can be a value of @ref TIM_ModeTypeDef
  87. 79 * @param TIM_Clk: Specifies the clock division.
  88. 80 * This parameter can be a value of @ref TIM_ClkDivTypeDef
  89. 81 * @param InitCnt: specifies the Counter register initial value.
  90. 82 * @retval None
  91. 83 */
  92. 84 void TIM_TimeBaseInit(TIM_IdTypeDef TIMERx, TIM_ModeTypeDef TIM_Mode, TIM_ClkDivTypeDef TIM_Clk, u16 InitC
  93. -nt)
  94. 85 {
  95. 86 1 /* Check the parameters */
  96. 87 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  97. 88 1
  98. 89 1 if (TIMERx == TIMER0)
  99. 90 1 {
  100. 91 2 /* set timer0 disable */
  101. 92 2 TR0 = 0;
  102. 93 2
  103. 94 2 /* set timer0 initial count */
  104. 95 2 if (TIM_Mode == TIM0_Mode2_8BitAutoReload)
  105. 96 2 {
  106. 97 3 TH0 = InitCnt & 0xff;
  107. 98 3 TL0 = TH0;
  108. 99 3 }
  109. 100 2 else
  110. 101 2 {
  111. 102 3 TIM_SET_VAL(TH0, TL0, InitCnt);
  112. 103 3 }
  113. 104 2
  114. 105 2 /* set timer0 basetime enable */
  115. 106 2 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 0 << TMOD_TIM0_CT_Pos);
  116. 107 2
  117. 108 2 /* set timer0 workmode */
  118. 109 2 MODIFY_REG(TMOD, TMOD_TIM0_MODE_Msk, TIM_Mode << TMOD_TIM0_MODE_Pos);
  119. 110 2 }
  120. 111 1 else if (TIMERx == TIMER1)
  121. 112 1 {
  122. 113 2 /* set timer1 disable */
  123. 114 2 TR1 = 0;
  124. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 3
  125. 115 2
  126. 116 2 /* set timer1 initial count */
  127. 117 2 if (TIM_Mode == TIM1_Mode2_8BitAutoReload)
  128. 118 2 {
  129. 119 3 TH1 = InitCnt & 0xff;
  130. 120 3 TL1 = TH1;
  131. 121 3 }
  132. 122 2 else
  133. 123 2 {
  134. 124 3 TIM_SET_VAL(TH1, TL1, InitCnt);
  135. 125 3 }
  136. 126 2
  137. 127 2 /* set timer1 basetime enable */
  138. 128 2 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 0 << TMOD_TIM1_CT_Pos);
  139. 129 2
  140. 130 2 /* set timer1 workmode */
  141. 131 2 MODIFY_REG(TMOD, TMOD_TIM1_MODE_Msk, TIM_Mode << TMOD_TIM1_MODE_Pos);
  142. 132 2 }
  143. 133 1 else if (TIMERx == TIMER2)
  144. 134 1 {
  145. 135 2 /* set timer2 disable */
  146. 136 2 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  147. 137 2
  148. 138 2 /* set timer2 initial count */
  149. 139 2 TIM_SET_VAL(TH2, TL2, InitCnt);
  150. 140 2
  151. 141 2 /* set timer2 reload count */
  152. 142 2 TIM_SET_VAL(CRCH, CRCL, InitCnt);
  153. 143 2
  154. 144 2 /* set timer2 clock division */
  155. 145 2 MODIFY_REG(T2CON, T2CON_T2PS_Msk, TIM_Clk << T2CON_T2PS_Pos);
  156. 146 2
  157. 147 2 if (TIM2_Mode0_16BitAutoReload == TIM_Mode)
  158. 148 2 {
  159. 149 3 /* set timer2 reload mode0 */
  160. 150 3 MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_MODE0 << T2CON_T2R_Pos);
  161. 151 3 }
  162. 152 2 else
  163. 153 2 {
  164. 154 3 /* set timer2 reload mode0 */
  165. 155 3 MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_DISABLE << T2CON_T2R_Pos);
  166. 156 3 }
  167. 157 2 }
  168. 158 1 }
  169. 159
  170. 160 /**
  171. 161 * @brief Enables or disables TIMERx peripheral external signal count function.
  172. 162 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  173. 163 * @param TIM_Mode: specifies the workmode of timer.
  174. 164 * This parameter can be a value of @ref TIM_ModeTypeDef
  175. 165 * @param NewState: new state of the TIMERx peripheral count function.
  176. 166 * This parameter can be: ENABLE or DISABLE.
  177. 167 * @retval None
  178. 168 */
  179. 169 void TIM_ExtCntConfig(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  180. 170 {
  181. 171 1 /* Check the parameters */
  182. 172 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  183. 173 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  184. 174 1
  185. 175 1 switch (TIMERx)
  186. 176 1 {
  187. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 4
  188. 177 2 case TIMER0:
  189. 178 2 {
  190. 179 3 if (NewState != DISABLE)
  191. 180 3 {
  192. 181 4 /* set timer0 clock source from t0 pin(falling edge) */
  193. 182 4 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 1 << TMOD_TIM0_CT_Pos);
  194. 183 4 }
  195. 184 3 else
  196. 185 3 {
  197. 186 4 /* set timer0 basetime enable */
  198. 187 4 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 0 << TMOD_TIM0_CT_Pos);
  199. 188 4 }
  200. 189 3 break;
  201. 190 3 }
  202. 191 2 case TIMER1:
  203. 192 2 {
  204. 193 3 if (NewState != DISABLE)
  205. 194 3 {
  206. 195 4 /* set timer1 clock source from t1 pin(falling edge) */
  207. 196 4 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 1 << TMOD_TIM1_CT_Pos);
  208. 197 4 }
  209. 198 3 else
  210. 199 3 {
  211. 200 4 /* set timer1 basetime enable */
  212. 201 4 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 0 << TMOD_TIM1_CT_Pos);
  213. 202 4 }
  214. 203 3 break;
  215. 204 3 }
  216. 205 2 case TIMER2:
  217. 206 2 {
  218. 207 3 /* set timer2 disable */
  219. 208 3 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  220. 209 3
  221. 210 3 if (NewState != DISABLE)
  222. 211 3 {
  223. 212 4 /* set timer2 clock source from t2 pin(falling edge) */
  224. 213 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_T2PIN << T2CON_T2I_Pos);
  225. 214 4 }
  226. 215 3 else
  227. 216 3 {
  228. 217 4 /* set timer2 clock source from xtal or rch */
  229. 218 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  230. 219 4 }
  231. 220 3 break;
  232. 221 3 }
  233. 222 2 default:
  234. 223 2 break;
  235. 224 2 }
  236. 225 1 }
  237. 226
  238. 227 /**
  239. 228 * @brief Enables or disables TIMERx peripheral clock gate.
  240. 229 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  241. 230 * @param TIM_Mode: specifies the workmode of timer.
  242. 231 * This parameter can be a value of @ref TIM_ModeTypeDef
  243. 232 * @param NewState: new state of the TIMERx peripheral clock gate.
  244. 233 * This parameter can be: ENABLE or DISABLE.
  245. 234 * @retval None
  246. 235 */
  247. 236 void TIM_GateConfig(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  248. 237 {
  249. 238 1 /* Check the parameters */
  250. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 5
  251. 239 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  252. 240 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  253. 241 1
  254. 242 1 switch (TIMERx)
  255. 243 1 {
  256. 244 2 case TIMER0:
  257. 245 2 {
  258. 246 3 if (NewState != DISABLE)
  259. 247 3 {
  260. 248 4 /* set timer0 external clock count gate function enable */
  261. 249 4 MODIFY_REG(TMOD, TMOD_TIM0_GATE_Msk, 1 << TMOD_TIM0_GATE_Pos);
  262. 250 4 }
  263. 251 3 else
  264. 252 3 {
  265. 253 4 /* set timer0 basetime enable */
  266. 254 4 MODIFY_REG(TMOD, TMOD_TIM0_GATE_Msk, 0 << TMOD_TIM0_GATE_Pos);
  267. 255 4 }
  268. 256 3 break;
  269. 257 3 }
  270. 258 2 case TIMER1:
  271. 259 2 {
  272. 260 3 if (NewState != DISABLE)
  273. 261 3 {
  274. 262 4 /* set timer1 external clock gate function enable */
  275. 263 4 MODIFY_REG(TMOD, TMOD_TIM1_GATE_Msk, 1 << TMOD_TIM1_GATE_Pos);
  276. 264 4 }
  277. 265 3 else
  278. 266 3 {
  279. 267 4 /* set timer1 basetime enable */
  280. 268 4 MODIFY_REG(TMOD, TMOD_TIM1_GATE_Msk, 0 << TMOD_TIM1_GATE_Pos);
  281. 269 4 }
  282. 270 3 break;
  283. 271 3 }
  284. 272 2 case TIMER2:
  285. 273 2 {
  286. 274 3 /* set timer2 disable */
  287. 275 3 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  288. 276 3
  289. 277 3 if (NewState != DISABLE)
  290. 278 3 {
  291. 279 4 /* set timer1 internal clock gate function enable */
  292. 280 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_GATE_CTRL << T2CON_T2I_Pos);
  293. 281 4 }
  294. 282 3 else
  295. 283 3 {
  296. 284 4 /* set timer2 clock source from xtal or rch */
  297. 285 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  298. 286 4 }
  299. 287 3 break;
  300. 288 3 }
  301. 289 2 default:
  302. 290 2 break;
  303. 291 2 }
  304. 292 1 }
  305. 293
  306. 294 /**
  307. 295 * @brief Initializes the TIMER2 compare peripheral
  308. 296 * according to the specified parameters.
  309. 297 * @param TIMERx: TIMER2(only support TIMER2).
  310. 298 * @param channel: specifies the compare channel of TIMER2.
  311. 299 * This parameter can be a value of @ref TIM_ChTypeDef
  312. 300 * @param CmpMode: Specifies the compare mode of TIMER2.
  313. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 6
  314. 301 * This parameter can be a value of @ref TIM_CmpModeTypeDef
  315. 302 * @param CmpVal: specifies the initial value of compare register.
  316. 303 * @retval None
  317. 304 */
  318. 305 void TIM_CmpInit(TIM_IdTypeDef TIMERx, TIM_ChTypeDef Channel, TIM_CmpModeTypeDef CmpMode, u16 CmpVal)
  319. 306 {
  320. 307 1 /* Check the parameters */
  321. 308 1 assert_param(TIMER2 == TIMERx);
  322. 309 1
  323. 310 1 if (TIMER2 != TIMERx)
  324. 311 1 {
  325. 312 2 return;
  326. 313 2 }
  327. 314 1
  328. 315 1 /* set timer2 reload mode disable */
  329. 316 1 // MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_DISABLE<<T2CON_T2R_Pos);
  330. 317 1
  331. 318 1 /* disable timer2 compare&capture function */
  332. 319 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpCapDisable << CCEN_COCA0_Pos);
  333. 320 1
  334. 321 1 /* set timer2 compare/capture register */
  335. 322 1 if (Channel == TIM_Channel0)
  336. 323 1 {
  337. 324 2 TIM_SET_VAL(CRCH, CRCL, CmpVal);
  338. 325 2 }
  339. 326 1 else if (Channel == TIM_Channel1)
  340. 327 1 {
  341. 328 2 TIM_SET_VAL(CCH1, CCL1, CmpVal);
  342. 329 2 }
  343. 330 1 else if (Channel == TIM_Channel2)
  344. 331 1 {
  345. 332 2 TIM_SET_VAL(CCH2, CCL2, CmpVal);
  346. 333 2 }
  347. 334 1 else if (Channel == TIM_Channel3)
  348. 335 1 {
  349. 336 2 TIM_SET_VAL(CCH3, CCL3, CmpVal);
  350. 337 2 }
  351. 338 1
  352. 339 1 /* set timer2 compare mode */
  353. 340 1 MODIFY_REG(T2CON, T2CON_T2CM_Msk, CmpMode << T2CON_T2CM_Pos);
  354. 341 1
  355. 342 1 /* enable timer2 compare function */
  356. 343 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpEnable << (Channel << 1));
  357. 344 1 }
  358. 345
  359. 346 /**
  360. 347 * @brief Initializes the TIMER2 capture peripheral
  361. 348 * according to the specified parameters.
  362. 349 * @param TIMERx: TIMER2(only support TIMER2).
  363. 350 * @param channel: specifies the compare channel of TIMER2.
  364. 351 * This parameter can be a value of @ref TIM_ChTypeDef
  365. 352 * @param CmpMode: Specifies the capture mode of TIMER2.
  366. 353 * This parameter can be a value of @ref TIM_CapModeTypeDef
  367. 354 * @param CmpVal: specifies the initial value of compare register.
  368. 355 * @retval None
  369. 356 */
  370. 357 void TIM_CapInit(TIM_IdTypeDef TIMERx, TIM_ChTypeDef Channel, TIM_CapModeTypeDef CapMode, TIM_CapPolTypeDe
  371. -f Polarity,
  372. 358 u16 CmpVal)
  373. 359 {
  374. 360 1 /* Check the parameters */
  375. 361 1 assert_param(TIMER2 == TIMERx);
  376. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 7
  377. 362 1
  378. 363 1 if (TIMER2 != TIMERx)
  379. 364 1 {
  380. 365 2 return;
  381. 366 2 }
  382. 367 1
  383. 368 1 /* disable timer2 compare&capture function */
  384. 369 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpCapDisable << CCEN_COCA0_Pos);
  385. 370 1
  386. 371 1 /* set timer2 compare/capture register */
  387. 372 1 if (Channel == TIM_Channel0)
  388. 373 1 {
  389. 374 2 TIM_SET_VAL(CRCH, CRCH, CmpVal);
  390. 375 2 }
  391. 376 1 else if (Channel == TIM_Channel1)
  392. 377 1 {
  393. 378 2 TIM_SET_VAL(CCH1, CCL1, CmpVal);
  394. 379 2 }
  395. 380 1 else if (Channel == TIM_Channel2)
  396. 381 1 {
  397. 382 2 TIM_SET_VAL(CCH2, CCL2, CmpVal);
  398. 383 2 }
  399. 384 1 else if (Channel == TIM_Channel3)
  400. 385 1 {
  401. 386 2 TIM_SET_VAL(CCH3, CCL3, CmpVal);
  402. 387 2 }
  403. 388 1
  404. 389 1 if (TIM_CapMode0 == CapMode)
  405. 390 1 {
  406. 391 2 /* set timer2 capture mode0 */
  407. 392 2 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CapCCxPin << (Channel << 1));
  408. 393 2
  409. 394 2 /* set timer2 input polarity */
  410. 395 2 MODIFY_REG(TCAPCON, TCAPCON_CC0_Msk << (Channel << 1), Polarity << (Channel << 1));
  411. 396 2 }
  412. 397 1 else if (TIM_CapMode1 == CapMode)
  413. 398 1 {
  414. 399 2 /* set timer2 capture mode0 */
  415. 400 2 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CapSoftTrigger << (Channel << 1));
  416. 401 2 }
  417. 402 1 }
  418. 403
  419. 404 /**
  420. 405 * @brief Enables or disables the specified TIM peripheral.
  421. 406 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  422. 407 * @param NewState: new state of the TIMERx peripheral.
  423. 408 * This parameter can be: ENABLE or DISABLE.
  424. 409 * @retval None
  425. 410 */
  426. 411 void TIM_Cmd(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  427. 412 {
  428. 413 1 /* Check the parameters */
  429. 414 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  430. 415 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  431. 416 1
  432. 417 1 switch (TIMERx)
  433. 418 1 {
  434. 419 2 case TIMER0:
  435. 420 2 {
  436. 421 3 if (NewState != DISABLE)
  437. 422 3 {
  438. 423 4 TR0 = 1; /* set timer0 enable */
  439. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 8
  440. 424 4 }
  441. 425 3 else
  442. 426 3 {
  443. 427 4 TR0 = 0; /* set timer0 disable */
  444. 428 4 }
  445. 429 3 break;
  446. 430 3 }
  447. 431 2 case TIMER1:
  448. 432 2 {
  449. 433 3 if (NewState != DISABLE)
  450. 434 3 {
  451. 435 4 TR1 = 1; /* set timer1 enable */
  452. 436 4 }
  453. 437 3 else
  454. 438 3 {
  455. 439 4 TR1 = 0; /* set timer1 disable */
  456. 440 4 }
  457. 441 3 break;
  458. 442 3 }
  459. 443 2 case TIMER2:
  460. 444 2 {
  461. 445 3 if (NewState != DISABLE)
  462. 446 3 {
  463. 447 4 /* set Timer2 enable */
  464. 448 4 if ((T2CON & T2CON_T2I_Msk) == TIM2_CLK_STOP)
  465. 449 4 {
  466. 450 5 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  467. 451 5 }
  468. 452 4 }
  469. 453 3 else
  470. 454 3 {
  471. 455 4 /* set timer2 disable */
  472. 456 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  473. 457 4 }
  474. 458 3 break;
  475. 459 3 }
  476. 460 2 default:
  477. 461 2 break;
  478. 462 2 }
  479. 463 1 }
  480. 464
  481. 465 /**
  482. 466 * @brief This function enable TIMERx interrupt
  483. 467 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  484. 468 * @retval None
  485. 469 */
  486. 470 void TIM_EnableIRQ(TIM_IdTypeDef TIMERx)
  487. 471 {
  488. 472 1 /* Check the parameters */
  489. 473 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  490. 474 1
  491. 475 1 switch (TIMERx)
  492. 476 1 {
  493. 477 2 case TIMER0:
  494. 478 2 {
  495. 479 3 ET0 = 1;
  496. 480 3 break;
  497. 481 3 }
  498. 482 2 case TIMER1:
  499. 483 2 {
  500. 484 3 ET1 = 1;
  501. 485 3 break;
  502. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 9
  503. 486 3 }
  504. 487 2 case TIMER2:
  505. 488 2 {
  506. 489 3 ET2 = 1;
  507. 490 3 break;
  508. 491 3 }
  509. 492 2 default:
  510. 493 2 break;
  511. 494 2 }
  512. 495 1 }
  513. 496
  514. 497 /**
  515. 498 * @brief This function disable TIMERx interrupt
  516. 499 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  517. 500 * @retval None
  518. 501 */
  519. 502 void TIM_DisableIRQ(TIM_IdTypeDef TIMERx)
  520. 503 {
  521. 504 1 /* Check the parameters */
  522. 505 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  523. 506 1
  524. 507 1 switch (TIMERx)
  525. 508 1 {
  526. 509 2 case TIMER0:
  527. 510 2 {
  528. 511 3 ET0 = 0;
  529. 512 3 break;
  530. 513 3 }
  531. 514 2 case TIMER1:
  532. 515 2 {
  533. 516 3 ET1 = 0;
  534. 517 3 break;
  535. 518 3 }
  536. 519 2 case TIMER2:
  537. 520 2 {
  538. 521 3 ET2 = 0;
  539. 522 3 break;
  540. 523 3 }
  541. 524 2 default:
  542. 525 2 break;
  543. 526 2 }
  544. 527 1 }
  545. 528 /**
  546. 529 * @}
  547. 530 */
  548. 531
  549. 532 /**
  550. 533 * @}
  551. 534 */
  552. 535
  553. 536 /**
  554. 537 * @}
  555. 538 */
  556. MODULE INFORMATION: STATIC OVERLAYABLE
  557. CODE SIZE = 854 ----
  558. CONSTANT SIZE = ---- ----
  559. XDATA SIZE = ---- ----
  560. PDATA SIZE = ---- ----
  561. DATA SIZE = ---- 16
  562. IDATA SIZE = ---- ----
  563. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:21:11 PAGE 10
  564. BIT SIZE = ---- ----
  565. EDATA SIZE = ---- ----
  566. HDATA SIZE = ---- ----
  567. XDATA CONST SIZE = ---- ----
  568. FAR CONST SIZE = ---- ----
  569. END OF MODULE INFORMATION.
  570. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)