timer.lst 24 KB

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  1. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 1
  2. C51 COMPILER V9.60.7.0, COMPILATION OF MODULE TIMER
  3. OBJECT MODULE PLACED IN .\Objects\timer.obj
  4. COMPILER INVOKED BY: d:\Keil_v5\C51\BIN\C51.EXE ..\..\..\..\driver\src\timer.c OBJECTADVANCED OPTIMIZE(9,SPEED) BROWSE O
  5. -RDER NOAREGS MODC2 INCDIR(..\..\..\..\driver\inc;..\..\..\..\mcu;..\..\..\..\middleware\log;..\..\..\..\middleware\delay
  6. -;..\..\..\..\middleware\rf_basis) DEFINE(IS_CLIENT_BOARD=1) DEBUG PRINT(.\Listings\timer.lst) TABS(2) OBJECT(.\Objects\t
  7. -imer.obj)
  8. line level source
  9. 1 /**
  10. 2 ************************************************************************
  11. 3 * @file timer.c
  12. 4 * @author Panchip Team
  13. 5 * @version V0.5
  14. 6 * @date 2024-04-28
  15. 7 * @brief This file provides all the timer firmware functions.
  16. 8 * @note
  17. 9 * Copyright (C) 2024 Panchip Technology Corp. All rights reserved.
  18. 10 ****************************************************************************
  19. 11 */
  20. 12
  21. 13 #include "timer.h"
  22. 14
  23. 15 /** @addtogroup PAN262x_Std_Driver
  24. 16 * @{
  25. 17 */
  26. 18
  27. 19 /** @defgroup TIMER
  28. 20 * @brief TIMER driver modules
  29. 21 * @{
  30. 22 */
  31. 23
  32. 24 /** @defgroup TIMER_Private_Functions
  33. 25 * @{
  34. 26 */
  35. 27
  36. 28 /**
  37. 29 * @brief Deinitializes the TIMx peripheral registers to their default reset values.
  38. 30 * @param TIMx: where x can be 0 to 2 to select the TIM peripheral.
  39. 31 * @retval None
  40. 32 */
  41. 33 void TIM_DeInit(TIM_IdTypeDef TIMERx)
  42. 34 {
  43. 35 1 /* Check the parameters */
  44. 36 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  45. 37 1
  46. 38 1 if (TIMERx == TIMER0)
  47. 39 1 {
  48. 40 2 TR0 = 0;
  49. 41 2 TF0 = 0;
  50. 42 2 TL0 = 0;
  51. 43 2 TH0 = 0;
  52. 44 2 TMOD &= ~0x0F;
  53. 45 2 }
  54. 46 1 else if (TIMERx == TIMER1)
  55. 47 1 {
  56. 48 2 TR1 = 0;
  57. 49 2 TF1 = 0;
  58. 50 2 TL1 = 0;
  59. 51 2 TH1 = 0;
  60. 52 2 TMOD &= ~0xF0;
  61. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 2
  62. 53 2 }
  63. 54 1 else if (TIMERx == TIMER2)
  64. 55 1 {
  65. 56 2 T2CON = 0;
  66. 57 2 CCEN = 0;
  67. 58 2 TL2 = 0;
  68. 59 2 TH2 = 0;
  69. 60 2 TCAPCON = 0;
  70. 61 2 TCAPSTA = 0;
  71. 62 2 CRCH = 0;
  72. 63 2 CRCL = 0;
  73. 64 2 CCH1 = 0;
  74. 65 2 CCL1 = 0;
  75. 66 2 CCH2 = 0;
  76. 67 2 CCL2 = 0;
  77. 68 2 CCH3 = 0;
  78. 69 2 CCL3 = 0;
  79. 70 2 }
  80. 71 1 }
  81. 72
  82. 73 /**
  83. 74 * @brief Initializes the TIMERx Time Base Unit peripheral according to
  84. 75 * the specified parameters in the TIM_TimeBaseInitStruct.
  85. 76 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  86. 77 * @param TIM_Mode: specifies the workmode of timer.
  87. 78 * This parameter can be a value of @ref TIM_ModeTypeDef
  88. 79 * @param TIM_Clk: Specifies the clock division.
  89. 80 * This parameter can be a value of @ref TIM_ClkDivTypeDef
  90. 81 * @param InitCnt: specifies the Counter register initial value.
  91. 82 * @retval None
  92. 83 */
  93. 84 void TIM_TimeBaseInit(TIM_IdTypeDef TIMERx, TIM_ModeTypeDef TIM_Mode, TIM_ClkDivTypeDef TIM_Clk, u16 InitC
  94. -nt)
  95. 85 {
  96. 86 1 /* Check the parameters */
  97. 87 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  98. 88 1
  99. 89 1 if (TIMERx == TIMER0)
  100. 90 1 {
  101. 91 2 /* set timer0 disable */
  102. 92 2 TR0 = 0;
  103. 93 2
  104. 94 2 /* set timer0 initial count */
  105. 95 2 if (TIM_Mode == TIM0_Mode2_8BitAutoReload)
  106. 96 2 {
  107. 97 3 TH0 = InitCnt & 0xff;
  108. 98 3 TL0 = TH0;
  109. 99 3 }
  110. 100 2 else
  111. 101 2 {
  112. 102 3 TIM_SET_VAL(TH0, TL0, InitCnt);
  113. 103 3 }
  114. 104 2
  115. 105 2 /* set timer0 basetime enable */
  116. 106 2 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 0 << TMOD_TIM0_CT_Pos);
  117. 107 2
  118. 108 2 /* set timer0 workmode */
  119. 109 2 MODIFY_REG(TMOD, TMOD_TIM0_MODE_Msk, TIM_Mode << TMOD_TIM0_MODE_Pos);
  120. 110 2 }
  121. 111 1 else if (TIMERx == TIMER1)
  122. 112 1 {
  123. 113 2 /* set timer1 disable */
  124. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 3
  125. 114 2 TR1 = 0;
  126. 115 2
  127. 116 2 /* set timer1 initial count */
  128. 117 2 if (TIM_Mode == TIM1_Mode2_8BitAutoReload)
  129. 118 2 {
  130. 119 3 TH1 = InitCnt & 0xff;
  131. 120 3 TL1 = TH1;
  132. 121 3 }
  133. 122 2 else
  134. 123 2 {
  135. 124 3 TIM_SET_VAL(TH1, TL1, InitCnt);
  136. 125 3 }
  137. 126 2
  138. 127 2 /* set timer1 basetime enable */
  139. 128 2 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 0 << TMOD_TIM1_CT_Pos);
  140. 129 2
  141. 130 2 /* set timer1 workmode */
  142. 131 2 MODIFY_REG(TMOD, TMOD_TIM1_MODE_Msk, TIM_Mode << TMOD_TIM1_MODE_Pos);
  143. 132 2 }
  144. 133 1 else if (TIMERx == TIMER2)
  145. 134 1 {
  146. 135 2 /* set timer2 disable */
  147. 136 2 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  148. 137 2
  149. 138 2 /* set timer2 initial count */
  150. 139 2 TIM_SET_VAL(TH2, TL2, InitCnt);
  151. 140 2
  152. 141 2 /* set timer2 reload count */
  153. 142 2 TIM_SET_VAL(CRCH, CRCL, InitCnt);
  154. 143 2
  155. 144 2 /* set timer2 clock division */
  156. 145 2 MODIFY_REG(T2CON, T2CON_T2PS_Msk, TIM_Clk << T2CON_T2PS_Pos);
  157. 146 2
  158. 147 2 if (TIM2_Mode0_16BitAutoReload == TIM_Mode)
  159. 148 2 {
  160. 149 3 /* set timer2 reload mode0 */
  161. 150 3 MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_MODE0 << T2CON_T2R_Pos);
  162. 151 3 }
  163. 152 2 else
  164. 153 2 {
  165. 154 3 /* set timer2 reload mode0 */
  166. 155 3 MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_DISABLE << T2CON_T2R_Pos);
  167. 156 3 }
  168. 157 2 }
  169. 158 1 }
  170. 159
  171. 160 /**
  172. 161 * @brief Enables or disables TIMERx peripheral external signal count function.
  173. 162 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  174. 163 * @param TIM_Mode: specifies the workmode of timer.
  175. 164 * This parameter can be a value of @ref TIM_ModeTypeDef
  176. 165 * @param NewState: new state of the TIMERx peripheral count function.
  177. 166 * This parameter can be: ENABLE or DISABLE.
  178. 167 * @retval None
  179. 168 */
  180. 169 void TIM_ExtCntConfig(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  181. 170 {
  182. 171 1 /* Check the parameters */
  183. 172 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  184. 173 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  185. 174 1
  186. 175 1 switch (TIMERx)
  187. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 4
  188. 176 1 {
  189. 177 2 case TIMER0:
  190. 178 2 {
  191. 179 3 if (NewState != DISABLE)
  192. 180 3 {
  193. 181 4 /* set timer0 clock source from t0 pin(falling edge) */
  194. 182 4 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 1 << TMOD_TIM0_CT_Pos);
  195. 183 4 }
  196. 184 3 else
  197. 185 3 {
  198. 186 4 /* set timer0 basetime enable */
  199. 187 4 MODIFY_REG(TMOD, TMOD_TIM0_CT_Msk, 0 << TMOD_TIM0_CT_Pos);
  200. 188 4 }
  201. 189 3 break;
  202. 190 3 }
  203. 191 2 case TIMER1:
  204. 192 2 {
  205. 193 3 if (NewState != DISABLE)
  206. 194 3 {
  207. 195 4 /* set timer1 clock source from t1 pin(falling edge) */
  208. 196 4 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 1 << TMOD_TIM1_CT_Pos);
  209. 197 4 }
  210. 198 3 else
  211. 199 3 {
  212. 200 4 /* set timer1 basetime enable */
  213. 201 4 MODIFY_REG(TMOD, TMOD_TIM1_CT_Msk, 0 << TMOD_TIM1_CT_Pos);
  214. 202 4 }
  215. 203 3 break;
  216. 204 3 }
  217. 205 2 case TIMER2:
  218. 206 2 {
  219. 207 3 /* set timer2 disable */
  220. 208 3 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  221. 209 3
  222. 210 3 if (NewState != DISABLE)
  223. 211 3 {
  224. 212 4 /* set timer2 clock source from t2 pin(falling edge) */
  225. 213 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_T2PIN << T2CON_T2I_Pos);
  226. 214 4 }
  227. 215 3 else
  228. 216 3 {
  229. 217 4 /* set timer2 clock source from xtal or rch */
  230. 218 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  231. 219 4 }
  232. 220 3 break;
  233. 221 3 }
  234. 222 2 default:
  235. 223 2 break;
  236. 224 2 }
  237. 225 1 }
  238. 226
  239. 227 /**
  240. 228 * @brief Enables or disables TIMERx peripheral clock gate.
  241. 229 * @param TIMERx: where x can be 0 to 2 to select the TIM peripheral.
  242. 230 * @param TIM_Mode: specifies the workmode of timer.
  243. 231 * This parameter can be a value of @ref TIM_ModeTypeDef
  244. 232 * @param NewState: new state of the TIMERx peripheral clock gate.
  245. 233 * This parameter can be: ENABLE or DISABLE.
  246. 234 * @retval None
  247. 235 */
  248. 236 void TIM_GateConfig(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  249. 237 {
  250. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 5
  251. 238 1 /* Check the parameters */
  252. 239 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  253. 240 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  254. 241 1
  255. 242 1 switch (TIMERx)
  256. 243 1 {
  257. 244 2 case TIMER0:
  258. 245 2 {
  259. 246 3 if (NewState != DISABLE)
  260. 247 3 {
  261. 248 4 /* set timer0 external clock count gate function enable */
  262. 249 4 MODIFY_REG(TMOD, TMOD_TIM0_GATE_Msk, 1 << TMOD_TIM0_GATE_Pos);
  263. 250 4 }
  264. 251 3 else
  265. 252 3 {
  266. 253 4 /* set timer0 basetime enable */
  267. 254 4 MODIFY_REG(TMOD, TMOD_TIM0_GATE_Msk, 0 << TMOD_TIM0_GATE_Pos);
  268. 255 4 }
  269. 256 3 break;
  270. 257 3 }
  271. 258 2 case TIMER1:
  272. 259 2 {
  273. 260 3 if (NewState != DISABLE)
  274. 261 3 {
  275. 262 4 /* set timer1 external clock gate function enable */
  276. 263 4 MODIFY_REG(TMOD, TMOD_TIM1_GATE_Msk, 1 << TMOD_TIM1_GATE_Pos);
  277. 264 4 }
  278. 265 3 else
  279. 266 3 {
  280. 267 4 /* set timer1 basetime enable */
  281. 268 4 MODIFY_REG(TMOD, TMOD_TIM1_GATE_Msk, 0 << TMOD_TIM1_GATE_Pos);
  282. 269 4 }
  283. 270 3 break;
  284. 271 3 }
  285. 272 2 case TIMER2:
  286. 273 2 {
  287. 274 3 /* set timer2 disable */
  288. 275 3 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  289. 276 3
  290. 277 3 if (NewState != DISABLE)
  291. 278 3 {
  292. 279 4 /* set timer1 internal clock gate function enable */
  293. 280 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_GATE_CTRL << T2CON_T2I_Pos);
  294. 281 4 }
  295. 282 3 else
  296. 283 3 {
  297. 284 4 /* set timer2 clock source from xtal or rch */
  298. 285 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  299. 286 4 }
  300. 287 3 break;
  301. 288 3 }
  302. 289 2 default:
  303. 290 2 break;
  304. 291 2 }
  305. 292 1 }
  306. 293
  307. 294 /**
  308. 295 * @brief Initializes the TIMER2 compare peripheral
  309. 296 * according to the specified parameters.
  310. 297 * @param TIMERx: TIMER2(only support TIMER2).
  311. 298 * @param channel: specifies the compare channel of TIMER2.
  312. 299 * This parameter can be a value of @ref TIM_ChTypeDef
  313. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 6
  314. 300 * @param CmpMode: Specifies the compare mode of TIMER2.
  315. 301 * This parameter can be a value of @ref TIM_CmpModeTypeDef
  316. 302 * @param CmpVal: specifies the initial value of compare register.
  317. 303 * @retval None
  318. 304 */
  319. 305 void TIM_CmpInit(TIM_IdTypeDef TIMERx, TIM_ChTypeDef Channel, TIM_CmpModeTypeDef CmpMode, u16 CmpVal)
  320. 306 {
  321. 307 1 /* Check the parameters */
  322. 308 1 assert_param(TIMER2 == TIMERx);
  323. 309 1
  324. 310 1 if (TIMER2 != TIMERx)
  325. 311 1 {
  326. 312 2 return;
  327. 313 2 }
  328. 314 1
  329. 315 1 /* set timer2 reload mode disable */
  330. 316 1 // MODIFY_REG(T2CON, T2CON_T2R_Msk, TIM2_RELOAD_DISABLE<<T2CON_T2R_Pos);
  331. 317 1
  332. 318 1 /* disable timer2 compare&capture function */
  333. 319 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpCapDisable << CCEN_COCA0_Pos);
  334. 320 1
  335. 321 1 /* set timer2 compare/capture register */
  336. 322 1 if (Channel == TIM_Channel0)
  337. 323 1 {
  338. 324 2 TIM_SET_VAL(CRCH, CRCL, CmpVal);
  339. 325 2 }
  340. 326 1 else if (Channel == TIM_Channel1)
  341. 327 1 {
  342. 328 2 TIM_SET_VAL(CCH1, CCL1, CmpVal);
  343. 329 2 }
  344. 330 1 else if (Channel == TIM_Channel2)
  345. 331 1 {
  346. 332 2 TIM_SET_VAL(CCH2, CCL2, CmpVal);
  347. 333 2 }
  348. 334 1 else if (Channel == TIM_Channel3)
  349. 335 1 {
  350. 336 2 TIM_SET_VAL(CCH3, CCL3, CmpVal);
  351. 337 2 }
  352. 338 1
  353. 339 1 /* set timer2 compare mode */
  354. 340 1 MODIFY_REG(T2CON, T2CON_T2CM_Msk, CmpMode << T2CON_T2CM_Pos);
  355. 341 1
  356. 342 1 /* enable timer2 compare function */
  357. 343 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpEnable << (Channel << 1));
  358. 344 1 }
  359. 345
  360. 346 /**
  361. 347 * @brief Initializes the TIMER2 capture peripheral
  362. 348 * according to the specified parameters.
  363. 349 * @param TIMERx: TIMER2(only support TIMER2).
  364. 350 * @param channel: specifies the compare channel of TIMER2.
  365. 351 * This parameter can be a value of @ref TIM_ChTypeDef
  366. 352 * @param CmpMode: Specifies the capture mode of TIMER2.
  367. 353 * This parameter can be a value of @ref TIM_CapModeTypeDef
  368. 354 * @param CmpVal: specifies the initial value of compare register.
  369. 355 * @retval None
  370. 356 */
  371. 357 void TIM_CapInit(TIM_IdTypeDef TIMERx, TIM_ChTypeDef Channel, TIM_CapModeTypeDef CapMode, TIM_CapPolTypeDe
  372. -f Polarity,
  373. 358 u16 CmpVal)
  374. 359 {
  375. 360 1 /* Check the parameters */
  376. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 7
  377. 361 1 assert_param(TIMER2 == TIMERx);
  378. 362 1
  379. 363 1 if (TIMER2 != TIMERx)
  380. 364 1 {
  381. 365 2 return;
  382. 366 2 }
  383. 367 1
  384. 368 1 /* disable timer2 compare&capture function */
  385. 369 1 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CmpCapDisable << CCEN_COCA0_Pos);
  386. 370 1
  387. 371 1 /* set timer2 compare/capture register */
  388. 372 1 if (Channel == TIM_Channel0)
  389. 373 1 {
  390. 374 2 TIM_SET_VAL(CRCH, CRCH, CmpVal);
  391. 375 2 }
  392. 376 1 else if (Channel == TIM_Channel1)
  393. 377 1 {
  394. 378 2 TIM_SET_VAL(CCH1, CCL1, CmpVal);
  395. 379 2 }
  396. 380 1 else if (Channel == TIM_Channel2)
  397. 381 1 {
  398. 382 2 TIM_SET_VAL(CCH2, CCL2, CmpVal);
  399. 383 2 }
  400. 384 1 else if (Channel == TIM_Channel3)
  401. 385 1 {
  402. 386 2 TIM_SET_VAL(CCH3, CCL3, CmpVal);
  403. 387 2 }
  404. 388 1
  405. 389 1 if (TIM_CapMode0 == CapMode)
  406. 390 1 {
  407. 391 2 /* set timer2 capture mode0 */
  408. 392 2 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CapCCxPin << (Channel << 1));
  409. 393 2
  410. 394 2 /* set timer2 input polarity */
  411. 395 2 MODIFY_REG(TCAPCON, TCAPCON_CC0_Msk << (Channel << 1), Polarity << (Channel << 1));
  412. 396 2 }
  413. 397 1 else if (TIM_CapMode1 == CapMode)
  414. 398 1 {
  415. 399 2 /* set timer2 capture mode0 */
  416. 400 2 MODIFY_REG(CCEN, CCEN_COCA0_Msk << (Channel << 1), TIM_CapSoftTrigger << (Channel << 1));
  417. 401 2 }
  418. 402 1 }
  419. 403
  420. 404 /**
  421. 405 * @brief Enables or disables the specified TIM peripheral.
  422. 406 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  423. 407 * @param NewState: new state of the TIMERx peripheral.
  424. 408 * This parameter can be: ENABLE or DISABLE.
  425. 409 * @retval None
  426. 410 */
  427. 411 void TIM_Cmd(TIM_IdTypeDef TIMERx, FunctionalState NewState)
  428. 412 {
  429. 413 1 /* Check the parameters */
  430. 414 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  431. 415 1 assert_param(IS_FUNCTIONAL_STATE(NewState));
  432. 416 1
  433. 417 1 switch (TIMERx)
  434. 418 1 {
  435. 419 2 case TIMER0:
  436. 420 2 {
  437. 421 3 if (NewState != DISABLE)
  438. 422 3 {
  439. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 8
  440. 423 4 TR0 = 1; /* set timer0 enable */
  441. 424 4 }
  442. 425 3 else
  443. 426 3 {
  444. 427 4 TR0 = 0; /* set timer0 disable */
  445. 428 4 }
  446. 429 3 break;
  447. 430 3 }
  448. 431 2 case TIMER1:
  449. 432 2 {
  450. 433 3 if (NewState != DISABLE)
  451. 434 3 {
  452. 435 4 TR1 = 1; /* set timer1 enable */
  453. 436 4 }
  454. 437 3 else
  455. 438 3 {
  456. 439 4 TR1 = 0; /* set timer1 disable */
  457. 440 4 }
  458. 441 3 break;
  459. 442 3 }
  460. 443 2 case TIMER2:
  461. 444 2 {
  462. 445 3 if (NewState != DISABLE)
  463. 446 3 {
  464. 447 4 /* set Timer2 enable */
  465. 448 4 if ((T2CON & T2CON_T2I_Msk) == TIM2_CLK_STOP)
  466. 449 4 {
  467. 450 5 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_INTERNAL << T2CON_T2I_Pos);
  468. 451 5 }
  469. 452 4 }
  470. 453 3 else
  471. 454 3 {
  472. 455 4 /* set timer2 disable */
  473. 456 4 MODIFY_REG(T2CON, T2CON_T2I_Msk, TIM2_CLK_STOP << T2CON_T2I_Pos);
  474. 457 4 }
  475. 458 3 break;
  476. 459 3 }
  477. 460 2 default:
  478. 461 2 break;
  479. 462 2 }
  480. 463 1 }
  481. 464
  482. 465 /**
  483. 466 * @brief This function enable TIMERx interrupt
  484. 467 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  485. 468 * @retval None
  486. 469 */
  487. 470 void TIM_EnableIRQ(TIM_IdTypeDef TIMERx)
  488. 471 {
  489. 472 1 /* Check the parameters */
  490. 473 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  491. 474 1
  492. 475 1 switch (TIMERx)
  493. 476 1 {
  494. 477 2 case TIMER0:
  495. 478 2 {
  496. 479 3 ET0 = 1;
  497. 480 3 break;
  498. 481 3 }
  499. 482 2 case TIMER1:
  500. 483 2 {
  501. 484 3 ET1 = 1;
  502. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 9
  503. 485 3 break;
  504. 486 3 }
  505. 487 2 case TIMER2:
  506. 488 2 {
  507. 489 3 ET2 = 1;
  508. 490 3 break;
  509. 491 3 }
  510. 492 2 default:
  511. 493 2 break;
  512. 494 2 }
  513. 495 1 }
  514. 496
  515. 497 /**
  516. 498 * @brief This function disable TIMERx interrupt
  517. 499 * @param TIMERx: where x can be 0 to 2 to select the TIMERx peripheral.
  518. 500 * @retval None
  519. 501 */
  520. 502 void TIM_DisableIRQ(TIM_IdTypeDef TIMERx)
  521. 503 {
  522. 504 1 /* Check the parameters */
  523. 505 1 assert_param(IS_TIM_ALL_PERIPH(TIMERx));
  524. 506 1
  525. 507 1 switch (TIMERx)
  526. 508 1 {
  527. 509 2 case TIMER0:
  528. 510 2 {
  529. 511 3 ET0 = 0;
  530. 512 3 break;
  531. 513 3 }
  532. 514 2 case TIMER1:
  533. 515 2 {
  534. 516 3 ET1 = 0;
  535. 517 3 break;
  536. 518 3 }
  537. 519 2 case TIMER2:
  538. 520 2 {
  539. 521 3 ET2 = 0;
  540. 522 3 break;
  541. 523 3 }
  542. 524 2 default:
  543. 525 2 break;
  544. 526 2 }
  545. 527 1 }
  546. 528 /**
  547. 529 * @}
  548. 530 */
  549. 531
  550. 532 /**
  551. 533 * @}
  552. 534 */
  553. 535
  554. 536 /**
  555. 537 * @}
  556. 538 */
  557. MODULE INFORMATION: STATIC OVERLAYABLE
  558. CODE SIZE = 854 ----
  559. CONSTANT SIZE = ---- ----
  560. XDATA SIZE = ---- ----
  561. PDATA SIZE = ---- ----
  562. DATA SIZE = ---- 16
  563. C51 COMPILER V9.60.7.0 TIMER 11/21/2025 17:14:04 PAGE 10
  564. IDATA SIZE = ---- ----
  565. BIT SIZE = ---- ----
  566. EDATA SIZE = ---- ----
  567. HDATA SIZE = ---- ----
  568. XDATA CONST SIZE = ---- ----
  569. FAR CONST SIZE = ---- ----
  570. END OF MODULE INFORMATION.
  571. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)