gpio.lst 9.1 KB

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  1. C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 1
  2. C51 COMPILER V9.60.7.0, COMPILATION OF MODULE GPIO
  3. OBJECT MODULE PLACED IN .\Objects\gpio.obj
  4. COMPILER INVOKED BY: d:\Keil_v5\C51\BIN\C51.EXE ..\..\..\..\driver\src\gpio.c OBJECTADVANCED OPTIMIZE(9,SPEED) BROWSE OR
  5. -DER NOAREGS MODC2 INCDIR(..\..\..\..\driver\inc;..\..\..\..\mcu;..\..\..\..\middleware\log;..\..\..\..\middleware\delay;
  6. -..\..\..\..\middleware\rf_basis) DEFINE(IS_CLIENT_BOARD=1) DEBUG PRINT(.\Listings\gpio.lst) TABS(2) OBJECT(.\Objects\gpi
  7. -o.obj)
  8. line level source
  9. 1 /**
  10. 2 ************************************************************************
  11. 3 * @file gpio.c
  12. 4 * @author Panchip Team
  13. 5 * @version V0.5
  14. 6 * @date 2024-04-28
  15. 7 * @brief This file provides all the gpio firmware functions.
  16. 8 * @note
  17. 9 * Copyright (C) 2024 Panchip Technology Corp. All rights reserved.
  18. 10 ****************************************************************************
  19. 11 */
  20. 12
  21. 13 #include "gpio.h"
  22. 14
  23. 15 /** @addtogroup PAN262x_Std_Driver
  24. 16 * @{
  25. 17 */
  26. 18
  27. 19 /** @defgroup GPIO
  28. 20 * @brief GPIO driver modules
  29. 21 * @{
  30. 22 */
  31. 23
  32. 24 /** @defgroup GPIO_Private_Functions
  33. 25 * @{
  34. 26 */
  35. 27
  36. 28 code GpioInOutCfg_t GpioInOutCfg[GPIO_MODE_MAX] = {
  37. 29 /* Dien Doen */
  38. 30 {ENABLE, DISABLE}, // GPIO_MODE_INPUT
  39. 31 {ENABLE, ENABLE}, // GPIO_MODE_OUTPUT_PP
  40. 32 {ENABLE, ENABLE}, // GPIO_MODE_OUTPUT_OD
  41. 33 {DISABLE, DISABLE} // GPIO_MODE_ANALOG
  42. 34 };
  43. 35
  44. 36 /**
  45. 37 * @brief This function initializes GPIO_P1x/GPIO_P3x
  46. 38 * @param Port
  47. 39 * @arg GPIO_P10
  48. 40 * @arg GPIO_P11
  49. 41 * @arg GPIO_P12
  50. 42 * @arg GPIO_P13
  51. 43 * @arg GPIO_P14
  52. 44 * @arg GPIO_P15
  53. 45 * @arg GPIO_P16
  54. 46 * @arg GPIO_P30
  55. 47 * @arg GPIO_P31
  56. 48 * @arg GPIO_P32
  57. 49 * @arg GPIO_P33
  58. 50 * @arg GPIO_P34
  59. 51 * @arg GPIO_P35
  60. 52 * @arg GPIO_P36
  61. C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 2
  62. 53 * @arg GPIO_P37
  63. 54 * @param Mux
  64. 55 * @ref eGpioP1xMUX_t,where x can be 0 to 6
  65. 56 * @ref eGpioP3yMUX_t,where y can be 0 to 7
  66. 57 * @param Mode:
  67. 58 * @arg GPIO_MODE_INPUT
  68. 59 * @arg GPIO_MODE_OUTPUT_PP
  69. 60 * @arg GPIO_MODE_OUTPUT_OD
  70. 61 * @arg GPIO_MODE_ANALOG
  71. 62 * @param per : Pull:
  72. 63 * @arg GPIO_NOPULL
  73. 64 * @arg GPIO_PULLUP
  74. 65 * @arg GPIO_PULLDOWN
  75. 66 * @retval None
  76. 67 */
  77. 68 void GPIO_Init(u8 Port, u8 Mux, u8 Mode, u8 Pull)
  78. 69 {
  79. 70 1 P3Offset_t Offset;
  80. 71 1 u8 BitId = Port & 0x0F;
  81. 72 1
  82. 73 1 if ((Port & 0xF0) == GPIO_PORT1)
  83. 74 1 {
  84. 75 2 *(u8 *)(&Offset) = 0x00; /* P1x offset */
  85. 76 2 }
  86. 77 1 else if ((Port & 0xF0) == GPIO_PORT3)
  87. 78 1 {
  88. 79 2 *(u8 *)(&Offset) = 0xFB; /* P3x offset */
  89. 80 2 }
  90. 81 1 else
  91. 82 1 {
  92. 83 2 return;
  93. 84 2 }
  94. 85 1
  95. 86 1 /* set gpio multi function */
  96. 87 1 SET_WREG_BIT(SYS, SYS_P1_MFP0 + Offset.Mfp, BitId, Mux & GPIO_MUX_00X);
  97. 88 1 SET_WREG_BIT(SYS, SYS_P1_MFP1 + Offset.Mfp, BitId, Mux & GPIO_MUX_0X0);
  98. 89 1 SET_WREG_BIT(SYS, SYS_P1_MFP2 + Offset.Mfp, BitId, Mux & GPIO_MUX_X00);
  99. 90 1
  100. 91 1 /* set gpio Mode:digital input,push Pull,open drain,analog input */
  101. 92 1 if (Mode == GPIO_MODE_ANALOG)
  102. 93 1 {
  103. 94 2 SET_WREG_BIT(SYS, SYS_P1_MODE0 + Offset.Mode, BitId, 0);
  104. 95 2 SET_WREG_BIT(SYS, SYS_P1_MODE1 + Offset.Mode, BitId, 0);
  105. 96 2 }
  106. 97 1 else
  107. 98 1 {
  108. 99 2 SET_WREG_BIT(SYS, SYS_P1_MODE0 + Offset.Mode, BitId, Mode & GPIO_MODE_00X);
  109. 100 2 SET_WREG_BIT(SYS, SYS_P1_MODE1 + Offset.Mode, BitId, Mode & GPIO_MODE_0X0);
  110. 101 2 }
  111. 102 1
  112. 103 1 /* set gpio Px_x output&input enable or disable */
  113. 104 1 SET_WREG_BIT(SYS, SYS_P1_OE + Offset.Doen, BitId, GpioInOutCfg[Mode].Doen);
  114. 105 1 SET_WREG_BIT(SYS, SYS_P1_DIEN + Offset.Dien, BitId, GpioInOutCfg[Mode].Dien);
  115. 106 1
  116. 107 1 /* set gpio Px_x Pull up or down resistor */
  117. 108 1 SET_WREG_BIT(SYS, SYS_P1_PUEN + Offset.Puen, BitId, Pull & GPIO_PULLUP);
  118. 109 1 SET_WREG_BIT(SYS, SYS_P1_PDEN + Offset.Pden, BitId, Pull & GPIO_PULLDOWN);
  119. 110 1 }
  120. 111
  121. 112 /**
  122. 113 * @brief Config GPIO INT0/1 interrupt
  123. 114 * @param GPIO_INTx:where x can be 0 and 1
  124. C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 3
  125. 115 * @param Trigger: specifies gpio int0/1 trigger mode.
  126. 116 * This parameter can be a value of @ref PWM_ModeTypeDef
  127. 117 * @retval None
  128. 118 */
  129. 119 void GPIO_ExtIntConfig(u8 GPIO_INTx, GPIO_TriggerTypeDef Trigger)
  130. 120 {
  131. 121 1 if (GPIO_INTx == GPIO_INT0)
  132. 122 1 {
  133. 123 2 IT0 = Trigger;
  134. 124 2 EX0 = TRUE;
  135. 125 2 }
  136. 126 1 else
  137. 127 1 {
  138. 128 2 IT1 = Trigger;
  139. 129 2 EX1 = TRUE;
  140. 130 2 }
  141. 131 1 }
  142. 132
  143. 133 /**
  144. 134 * @brief This function enable gpio Debounce function
  145. 135 * @param GPIO_INTx: where x can be 0 and 1
  146. 136 * @param DbcTicks: debounce time=DbcTicks*128us
  147. 137 * @retval None
  148. 138 */
  149. 139 void GPIO_EnableDbc(u8 GPIO_INTx, u8 DbcTicks)
  150. 140 {
  151. 141 1 if (GPIO_INTx == GPIO_INT0)
  152. 142 1 {
  153. 143 2 MODIFY_WREG(SYS, EINT0_DBC, 0xFF, DbcTicks | 0x80);
  154. 144 2 }
  155. 145 1 else
  156. 146 1 {
  157. 147 2 MODIFY_WREG(SYS, EINT1_DBC, 0xFF, DbcTicks | 0x80);
  158. 148 2 }
  159. 149 1 }
  160. 150
  161. 151 /**
  162. 152 * @brief This function disable gpio Debounce function
  163. 153 * @param GPIO_INTx:where x can be 0 and 1
  164. 154 * @retval None
  165. 155 */
  166. 156 void GPIO_DisableDbc(u8 GPIO_INTx)
  167. 157 {
  168. 158 1 if (GPIO_INTx == GPIO_INT0)
  169. 159 1 {
  170. 160 2 MODIFY_WREG(SYS, EINT0_DBC, 0xFF, 0x00);
  171. 161 2 }
  172. 162 1 else
  173. 163 1 {
  174. 164 2 MODIFY_WREG(SYS, EINT1_DBC, 0xFF, 0x00);
  175. 165 2 }
  176. 166 1 }
  177. 167
  178. 168 /**
  179. 169 * @brief This function enable P36 reset function
  180. 170 * @param uDat
  181. 171 * @retval None
  182. 172 */
  183. 173 void GPIO_EnableRst(void)
  184. 174 {
  185. 175 1 ANA_SEL = GPIO_RCH_SYNC_TRG;
  186. 176 1 ANA_DAT |= P36_NRST_EN;
  187. C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 4
  188. 177 1 }
  189. 178
  190. 179 /**
  191. 180 * @brief This function disable P36 reset function
  192. 181 * @param uDat
  193. 182 * @retval None
  194. 183 */
  195. 184 void GPIO_DisableRst(void)
  196. 185 {
  197. 186 1 ANA_SEL = GPIO_RCH_SYNC_TRG;
  198. 187 1 ANA_DAT &= ~P36_NRST_EN;
  199. 188 1 }
  200. 189 /**
  201. 190 * @}
  202. 191 */
  203. 192
  204. 193 /**
  205. 194 * @}
  206. 195 */
  207. 196
  208. 197 /**
  209. 198 * @}
  210. 199 */
  211. MODULE INFORMATION: STATIC OVERLAYABLE
  212. CODE SIZE = 670 ----
  213. CONSTANT SIZE = 8 ----
  214. XDATA SIZE = ---- ----
  215. PDATA SIZE = ---- ----
  216. DATA SIZE = ---- 5
  217. IDATA SIZE = ---- ----
  218. BIT SIZE = ---- ----
  219. EDATA SIZE = ---- ----
  220. HDATA SIZE = ---- ----
  221. XDATA CONST SIZE = ---- ----
  222. FAR CONST SIZE = ---- ----
  223. END OF MODULE INFORMATION.
  224. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)