C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 1 C51 COMPILER V9.60.7.0, COMPILATION OF MODULE GPIO OBJECT MODULE PLACED IN .\Objects\gpio.obj COMPILER INVOKED BY: d:\Keil_v5\C51\BIN\C51.EXE ..\..\..\..\driver\src\gpio.c OBJECTADVANCED OPTIMIZE(9,SPEED) BROWSE OR -DER NOAREGS MODC2 INCDIR(..\..\..\..\driver\inc;..\..\..\..\mcu;..\..\..\..\middleware\log;..\..\..\..\middleware\delay; -..\..\..\..\middleware\rf_basis) DEFINE(IS_CLIENT_BOARD=1) DEBUG PRINT(.\Listings\gpio.lst) TABS(2) OBJECT(.\Objects\gpi -o.obj) line level source 1 /** 2 ************************************************************************ 3 * @file gpio.c 4 * @author Panchip Team 5 * @version V0.5 6 * @date 2024-04-28 7 * @brief This file provides all the gpio firmware functions. 8 * @note 9 * Copyright (C) 2024 Panchip Technology Corp. All rights reserved. 10 **************************************************************************** 11 */ 12 13 #include "gpio.h" 14 15 /** @addtogroup PAN262x_Std_Driver 16 * @{ 17 */ 18 19 /** @defgroup GPIO 20 * @brief GPIO driver modules 21 * @{ 22 */ 23 24 /** @defgroup GPIO_Private_Functions 25 * @{ 26 */ 27 28 code GpioInOutCfg_t GpioInOutCfg[GPIO_MODE_MAX] = { 29 /* Dien Doen */ 30 {ENABLE, DISABLE}, // GPIO_MODE_INPUT 31 {ENABLE, ENABLE}, // GPIO_MODE_OUTPUT_PP 32 {ENABLE, ENABLE}, // GPIO_MODE_OUTPUT_OD 33 {DISABLE, DISABLE} // GPIO_MODE_ANALOG 34 }; 35 36 /** 37 * @brief This function initializes GPIO_P1x/GPIO_P3x 38 * @param Port 39 * @arg GPIO_P10 40 * @arg GPIO_P11 41 * @arg GPIO_P12 42 * @arg GPIO_P13 43 * @arg GPIO_P14 44 * @arg GPIO_P15 45 * @arg GPIO_P16 46 * @arg GPIO_P30 47 * @arg GPIO_P31 48 * @arg GPIO_P32 49 * @arg GPIO_P33 50 * @arg GPIO_P34 51 * @arg GPIO_P35 52 * @arg GPIO_P36 C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 2 53 * @arg GPIO_P37 54 * @param Mux 55 * @ref eGpioP1xMUX_t,where x can be 0 to 6 56 * @ref eGpioP3yMUX_t,where y can be 0 to 7 57 * @param Mode: 58 * @arg GPIO_MODE_INPUT 59 * @arg GPIO_MODE_OUTPUT_PP 60 * @arg GPIO_MODE_OUTPUT_OD 61 * @arg GPIO_MODE_ANALOG 62 * @param per : Pull: 63 * @arg GPIO_NOPULL 64 * @arg GPIO_PULLUP 65 * @arg GPIO_PULLDOWN 66 * @retval None 67 */ 68 void GPIO_Init(u8 Port, u8 Mux, u8 Mode, u8 Pull) 69 { 70 1 P3Offset_t Offset; 71 1 u8 BitId = Port & 0x0F; 72 1 73 1 if ((Port & 0xF0) == GPIO_PORT1) 74 1 { 75 2 *(u8 *)(&Offset) = 0x00; /* P1x offset */ 76 2 } 77 1 else if ((Port & 0xF0) == GPIO_PORT3) 78 1 { 79 2 *(u8 *)(&Offset) = 0xFB; /* P3x offset */ 80 2 } 81 1 else 82 1 { 83 2 return; 84 2 } 85 1 86 1 /* set gpio multi function */ 87 1 SET_WREG_BIT(SYS, SYS_P1_MFP0 + Offset.Mfp, BitId, Mux & GPIO_MUX_00X); 88 1 SET_WREG_BIT(SYS, SYS_P1_MFP1 + Offset.Mfp, BitId, Mux & GPIO_MUX_0X0); 89 1 SET_WREG_BIT(SYS, SYS_P1_MFP2 + Offset.Mfp, BitId, Mux & GPIO_MUX_X00); 90 1 91 1 /* set gpio Mode:digital input,push Pull,open drain,analog input */ 92 1 if (Mode == GPIO_MODE_ANALOG) 93 1 { 94 2 SET_WREG_BIT(SYS, SYS_P1_MODE0 + Offset.Mode, BitId, 0); 95 2 SET_WREG_BIT(SYS, SYS_P1_MODE1 + Offset.Mode, BitId, 0); 96 2 } 97 1 else 98 1 { 99 2 SET_WREG_BIT(SYS, SYS_P1_MODE0 + Offset.Mode, BitId, Mode & GPIO_MODE_00X); 100 2 SET_WREG_BIT(SYS, SYS_P1_MODE1 + Offset.Mode, BitId, Mode & GPIO_MODE_0X0); 101 2 } 102 1 103 1 /* set gpio Px_x output&input enable or disable */ 104 1 SET_WREG_BIT(SYS, SYS_P1_OE + Offset.Doen, BitId, GpioInOutCfg[Mode].Doen); 105 1 SET_WREG_BIT(SYS, SYS_P1_DIEN + Offset.Dien, BitId, GpioInOutCfg[Mode].Dien); 106 1 107 1 /* set gpio Px_x Pull up or down resistor */ 108 1 SET_WREG_BIT(SYS, SYS_P1_PUEN + Offset.Puen, BitId, Pull & GPIO_PULLUP); 109 1 SET_WREG_BIT(SYS, SYS_P1_PDEN + Offset.Pden, BitId, Pull & GPIO_PULLDOWN); 110 1 } 111 112 /** 113 * @brief Config GPIO INT0/1 interrupt 114 * @param GPIO_INTx:where x can be 0 and 1 C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 3 115 * @param Trigger: specifies gpio int0/1 trigger mode. 116 * This parameter can be a value of @ref PWM_ModeTypeDef 117 * @retval None 118 */ 119 void GPIO_ExtIntConfig(u8 GPIO_INTx, GPIO_TriggerTypeDef Trigger) 120 { 121 1 if (GPIO_INTx == GPIO_INT0) 122 1 { 123 2 IT0 = Trigger; 124 2 EX0 = TRUE; 125 2 } 126 1 else 127 1 { 128 2 IT1 = Trigger; 129 2 EX1 = TRUE; 130 2 } 131 1 } 132 133 /** 134 * @brief This function enable gpio Debounce function 135 * @param GPIO_INTx: where x can be 0 and 1 136 * @param DbcTicks: debounce time=DbcTicks*128us 137 * @retval None 138 */ 139 void GPIO_EnableDbc(u8 GPIO_INTx, u8 DbcTicks) 140 { 141 1 if (GPIO_INTx == GPIO_INT0) 142 1 { 143 2 MODIFY_WREG(SYS, EINT0_DBC, 0xFF, DbcTicks | 0x80); 144 2 } 145 1 else 146 1 { 147 2 MODIFY_WREG(SYS, EINT1_DBC, 0xFF, DbcTicks | 0x80); 148 2 } 149 1 } 150 151 /** 152 * @brief This function disable gpio Debounce function 153 * @param GPIO_INTx:where x can be 0 and 1 154 * @retval None 155 */ 156 void GPIO_DisableDbc(u8 GPIO_INTx) 157 { 158 1 if (GPIO_INTx == GPIO_INT0) 159 1 { 160 2 MODIFY_WREG(SYS, EINT0_DBC, 0xFF, 0x00); 161 2 } 162 1 else 163 1 { 164 2 MODIFY_WREG(SYS, EINT1_DBC, 0xFF, 0x00); 165 2 } 166 1 } 167 168 /** 169 * @brief This function enable P36 reset function 170 * @param uDat 171 * @retval None 172 */ 173 void GPIO_EnableRst(void) 174 { 175 1 ANA_SEL = GPIO_RCH_SYNC_TRG; 176 1 ANA_DAT |= P36_NRST_EN; C51 COMPILER V9.60.7.0 GPIO 11/21/2025 17:14:04 PAGE 4 177 1 } 178 179 /** 180 * @brief This function disable P36 reset function 181 * @param uDat 182 * @retval None 183 */ 184 void GPIO_DisableRst(void) 185 { 186 1 ANA_SEL = GPIO_RCH_SYNC_TRG; 187 1 ANA_DAT &= ~P36_NRST_EN; 188 1 } 189 /** 190 * @} 191 */ 192 193 /** 194 * @} 195 */ 196 197 /** 198 * @} 199 */ MODULE INFORMATION: STATIC OVERLAYABLE CODE SIZE = 670 ---- CONSTANT SIZE = 8 ---- XDATA SIZE = ---- ---- PDATA SIZE = ---- ---- DATA SIZE = ---- 5 IDATA SIZE = ---- ---- BIT SIZE = ---- ---- EDATA SIZE = ---- ---- HDATA SIZE = ---- ---- XDATA CONST SIZE = ---- ---- FAR CONST SIZE = ---- ---- END OF MODULE INFORMATION. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)